Application information

The temperature dependence of RDS (ON) and K is a constant that is inversely proportional to the gate -drive current. Both MOSFETs have I2R loss N channel equations include an additional transmission loss, which is the highest at high input voltage. For VIN LT; 20V high -current efficiency generally improves for larger MOSFETs, and the transitional loss of VIN GT; 20V has increased rapidly to higher RDS (ON) devices with lower CRS (ON) devices. Synchronous MOSFET loss is maximum at a high input voltage or short circuit, the duty cycle of this switch is close to 100%. Please refer to the foldable flow limit part to further apply information. Terms (1+Δ) are usually used in the form of standardized RDS (on) and temperature curves, but Δ u003d 0.005/° C can be used as low -voltage MOSFET. CRS features are usually specified in MOSFET. The constant K u003d 2.5 can be used to mainly estimate the contribution switching equation of these two terms. Figure 1 Schartki's diode D1 provides two purposes. When running continuously, D1 is two high -power MOSFETs. This prevents the turnover of the MOSFET diode at the bottom of the body and stored in the death time, which may cost 1%. During the low -current operation, D1 works with the small top MOSFET to provide an efficient low -current output stage. A 1A Schottky is due to a relatively small average current, and these two areas are usually a good compromise.

CIN and COUT selection

In the continuous mode, the source current N -channel MOSFET at the top is a square wave with a duty cycle as VOUT/VIN. In order to prevent large voltage transient, the size of the capacitor with a low ESR input maximum square root current must be used. The maximum square -rooted capacitor current is concluded by the following formula:

This formula has a maximum value when Vin u003d 2vout, where IRMS u003d IOUT/2. This simple and worst case is usually used for design, because even a significant deviation does not provide too much relief. Note that the ripple current fixed value of the capacitor manufacturer is usually based on the significance of life of 2000 hours. Therefore, it is recommended to further reduce the capacitor, or choose a capacitor with a high rated value higher than the requirements. Several capacitors may also be designed in order to meet the requirements of size or height. If you have any questions, please consult the manufacturer. The choice of COUT depends on the required valid series resistance (ESR). Generally, once ESR requirements are met, the capacitance is sufficient to filter. The output ripple ( #8710; vout) is approximate:

Form F u003d operating frequency, COUT u003d output capacitor and #8710; il u003d in the inductor sensor in the inductor sensor Wave current. The maximum value of the output ripple at the maximum input voltage, because #8710; IL increases the input voltage. In the case of #8710; IL u003d 0.4iout (MAX), under the largest vehicle recognition code (VIN), the ripples are less than 100 millivolttrasion. Performance through hole capacitors. The capacitors provided by the OS-CON semiconductor electronics Sanyo have the lowest price of ESR (size) aluminum electrolyte. Once ESR's requirements for COUT are generally far more than Iriple (P-P) requirements. In the surface installation application, multiple capacitors may have to meet the processing requirements of ESR or RMS current applications. Aluminum electrolyte capacitors and dry capacitors have surface installation configurations. In the case of 钽, it is a surge test on the capacitor to switch the power supply. The best choice is the AVXTPS series of the surface stickers from 2 mm to 4 mm. Other capacitors types include Sanyo OS-CON, Nichicon PL series and Sprague593D and 595D series. Please consult the manufacturer for specific suggestions.

INTVCC regulator

The internal P -channel low -voltage difference regulator generates a 5V power supply to the drive and internal circuit in the LTC1436A/LTC1437A. INTVCC pins can be as high as 15 mAh, and must be at least 2.2 μF or low ESR electrolyte through bypass. Good bypass provides the current of the necessary MOSFET gate driver to provide high transients. Highly input voltage application, of which large MOSFETs are driven by high frequency, which may cause the maximum temperature rated value of LTC1436A/exceeding the LTC1437A. IC power current is the main power supply current when charging the grid to determine the exported EXTVCC source. The door charge depends on the operating frequency, such as the efficiency consideration. Estimation of the formula given in the node temperature can be estimated 1 electrical characteristics. For example, the 30V power supply of the LTC1437A is limited to below 19mA

to prevent the maximum knot temperature exceed that the input power current must be checked at the maximum vehicle recognition code (VIN) to run in a continuous mode. Essence

EXTVCC connection

LTC1436A/LTC1437A contains an internal P channel MOSFET switch connected to ExtVCC and INTVCC pins. The power supply is power supply and power supply as the EXTVCC pin is higher than 4.8V, and the shutdown state is kept before the EXTVCC drops below 4.5V to allow the MOSFET drive and control power to export the output (4.8V LT; VOUT LT; 9V) output. During the output, the output adjustment of the internal regulator (start, short circuit). Do not apply to the voltage of the ExtVCC pin greater than 10V, and it is trueEndvcc lt; vin. A significant efficiency can be achieved through power -on. As the VIN current generates the driver and the control current, the control current will pass the duty cycle/efficiency coefficient. For 5V regulator power supply refers to connecting the EXTVCC pin directly to VOUT. However, for 3.3V and other low -voltage regulators, additional circuits are required to obtain INTVCC power from output. The following table summarizes the four possible connections of EXTVCC:

1.ExtVCC left (or ground). This will cause INTVCC to lose up to 10%of the efficiency loss when the internal 5V regulator is powered by the internal 5V regulator.

2.ExtVCC is directly connected to VOUT. This is a normal phenomenon connection 5V regulator and provides the highest efficiency.

3.ExtVCC is connected to the output derived Boost network. For 3.3V and other low -voltage regulators, efficiency has been raised to more than 4.8V by connecting EXTVCC to the output voltage. This can be a simple magnetic advantage that the pump is shown in Figure 4A or the capacitive charging pump as shown in Figure 4A or the capacitive charge pump as shown in Figure 4A.

4.ExtVCC is connected to the external power supply. If the external power supply can be available in the range of 5V to 10V (Extvcc LT; VIN), it can be used to power the ExtVCC, provided that it is compatible with the MOSFET gate driver. When the driver's standard threshold MOSFET, the external power supply must always prevents MOSFET failure due to insufficient grille driver.

The upper module MOSFET driver power (CB, DB) connected to the outer self -lifting capacitor CB pins to the upper -voltage circuit is the upper module as the upper module Provide a gate -drive voltage MOSFET. The capacitor CB in the function chart is when the SW pin is very low. When a MOSFET in the upper part is turned on, the driver places the CB voltage on the mosFet required on the grid polar. This enhances MOSFET and turns on the upper switch. Open the voltage switch to VIN, and the booster tubes rose to VIN+INTVCC. The value of this booster capacitor CB requires 100 times the total input capacitance MOSFET with a total input capacitance greater than the upper module. In most applications, 0.1 μF is enough. The reverse fault on this DB must be greater than VIN (maximum value).

Output voltage programming

The output voltage is the selected member of the pins LTC1436A/LTC1437A series. The output voltage is the following:

vprog u003d 0V voltage u003d 3.3V

vprog u003d intcc vout u003d 5 volts

vprog u003d open (DC) vout u003d Tune

LTC1436A/LTC1437A series also has remote output voltage sensing capabilities. The top of the internal resistor is connected to Vosense. Fixed 3.3V and 5V output voltage applications Vosense pins connecting the output voltage as shown in Figure 5A as shown in Figure 5A. The VPROG pin is kept open (DC) Vosense pins to the feedback resistance as shown in Figure 5b.

Powering reset function (POR)

The power -on reset function monitoring output voltage open drainage channel regulations. The POR pin of the external pull -up resistor is needed. When the power supply is used for the first time, the POR output is pulled to the ground. When the output voltage rises to the final adjustment output value, the internal counter is started. After calculating the clock cycle of 216 (65536), the POR drop -down device is closed. When the output voltage reaches, the POR output will turn lower than about 30 μs at a time of 7.5%, indicating that there is a state of irregular state. During the shutdown, the POR output was pulled down, even if the output of the regulator was controlled by the external power supply.

Run/soft startup function

RUN/SS pin is a dual -purpose pin. It provides a soft startup function and close the LTC1436A/LTC1437A. Soft starting can reduce the surge current and gradually increase the internal current limit. Power sorting can also be used to complete this needle.

The internal 3 μA current source is the external current source charging capacitor CSS. When the voltage on the RUN/SS reaches 1.3V, the LTC1436A/LTC1437A starts to work. As a voltage ON RUN/SS, it continues to rise from 1.3V to 2.4V, then the internal current limit is also a linear change rate. The current limit starts at about 50mv (at VRUN/SS u003d 1.3V) and ends at 150mv/rsense (VRUN/SS GT; 2.7 volts). Therefore, the output current rises slowly to charge the output capacitor. If RUN/SS has been dragged on the ground, there is a delay of about 500ms/μF before starting, and then 500ms/μF to reach the full current. When tdlay u003d 5 (105) CSS seconds to pull RUN/SS pins below 1.3V, LTC1436A/

LTC1437A enters low static current shutdown (IQ LT; 25 Weire). This pin can be directly driven by logic, as shown in Figure 6 as shown in Figure 6. The diode D1 in FIG. 6 reduces the launch delay, but allows the CSS to slowly rise and soft startup function; if it does not need to start softly, you can delete this diode and CSS. RUN/SS pin has an internal 6V Zina pliers (see functional map).

Folding limit

If the power MOSFET and D1 selectionIn the worst case of the MOSFET, the scattering of the MOSFET occurs at short -circuit output, and the MOSFET simultaneously performs the current limit almost continuously. In most applications, it will not cause overheating and extend the failure interval. However, when the heat sinks is when the premium or higher RDS (on) MOSFET is used, the current should be reduced according to the severity of the fault. By adding a diode DFB between the output end and the i -i pin, the function chart shown in the middle. In the hard short circuit (VOUT u003d 0V), the current will be reduced to about 25%output current of the maximum value. This technology can be used to regulate all applications with an output voltage of 1.8V or higher.

Synchronization of the locking loop and frequency

LTC1436A-PLL/LTC1437A each has an internal voltage control oscillator and phase detector, including the locking loop. This allows the MOSFET to lock on the edge of the external source. The frequency range of this pressure -controlled oscillator is ± 30%around the center frequency FO. The value of COSC is the frequency FO calculated based on the expected operation. Assuming that the locking loop is locked (VPLLPF u003d 1.19 il):

The phase detector used is edge -sensitive digital type. It is external and internal oscillator. This type of phase detector does not lock in harmonics close to the frequency of VCO center. PLL maintenance range #8710; fH is equal to capture range: #8710; fH u003d #8710; fc u003d ± 0.3fo.

The output of the phase detector is a pair of complementary current sources charging or discharging the filter network on the external PLL LPF pin. The relationship between PLL LPF pin and working frequency are shown in Figure 7. The simplified frame diagram is shown in Figure 8. If the external frequency (FPLIN) is greater than the oscillation frequency (F), the current is continuously provided and the PLL LPF pin is pulled upward. When the external frequency is low, the current continues to sink, and the PLL LPF pin is lowered. If the external and internal frequencies are the same but there is a phase difference, the current source opens a period of time corresponding to the phase

. Therefore, the voltage on the PLL LPF pin can be adjusted until the external and interior phase and frequency oscillator are the same. At this stable working point phase comparator output, the filter capacitor CLP keeps voltage. CLP and RLP of the ring filter component enable the current pulse voltage voltage voltage voltage of the phase detector to control the stable input of the oscillator. Filter component CLP and RLP determine the speed of the ring. Usually, RLP u003d 10K, CLP is 0.01 μF to 0.1 μF. Make sure the low -end of the filter is connected to SGND. PLL LPF pins can be driven by external logic to get 1: 1.9 frequency movement. The circuit shown in FIG. 9 will provide frequency offset from FO to 1.9FO as the increase in voltage VPLLPF from 0V to 2.4V. Do not exceed 2.4VOn VplllPF.

Low battery comparator

LTC1436A/LTC1437A insufficient battery battery electricity can be used to detect comparative equipment conditions with insufficient battery battery, as shown in Figure 10 Show. This resistor separator R3 and R4 set the comparator's checkpoint to follow:

negative ( -) input end pressure

comparison device and internal internal 1.19V reference voltage for comparison. A built -in 20mv magnetic stagnation to ensure fast switching. This output is a leakage MOSFET that requires pulling resistors. The comparator does not work at the time of stopping. The low -voltage side of this resistor division should be connected to SGND.

SFB pin operation

When the SFB pin dropped to the 1.19V threshold below its reference ground, forced continuous mode operation. In the continuous mode, no matter what the load on the main switch is, the large N channel main switch and synchronous switch are output. In addition to providing logic input to compulsory continuous synchronization operation, the SFB pin provides a method to regulate the anti -aggressive winding output. Continuous simultaneous operation allows to extract power from auxiliary winding without considering the output load. The SFB pin can be continuously synchronized according to the needs of the anti -excitation winding. The secondary output voltage is returned from the transformer and a pair of external resistors to the SFB pin, as shown in Figure 4A. The secondary adjustment voltage VSEC in Figure 4A is:

In the formula, n is the turning ratio of the transformer, and VOUT is the main transition voltage induced by Vosense.

Auxiliary regulator/comparator

Auxiliary regulator/comparator can be used as a comparator or a low -voltage differential regulator (by adding an external PNP power -powered device). When the voltage on the Auxon pin is greater than 1.19V regulator/comparator. When the special circuit runs as a low -voltage differential regulator, it consumes less (20μA) bias current and remains stable at the same time. When the input level is driven, it will generate too large current as a comparator. The inner connection of the AUXDR pins is connected to the open drain MOSFET, which can sink to 10 mAh. The voltage is turned on AUXDR to determine whether the internal 12V resistor division is connected to Auxfb, as described below. AAUXDR and voltage need to be pulled with a pull -up resistor must not exceed 28V. Add an external PNP through the device, a linear can provide up to 0.5A regulator. As shown in Figure 12A, the base of the external PNP connector is connected to the AUXDR pin with a pull -up resistor. The output voltage of the outer collector VOAUXPNP is sensitive by Auxfb pin. The input voltage of the auxiliary regulator can be obtained from the secondary winding of the primary induction device as shown in Figure 11A. In this application, the input voltage of the SFB pin adjustment PNP regulator(See the SFB pin operation), and should be set to about 1V for the output voltage 2 voltage of the output voltage required by the auxiliary device. Zina diode pliers may need to keep the main server load of VSEC under 28V AUXDR pin specifications, while the auxiliary server load is insufficient. Auxfb pin is the feedback point of the regulator. An internal resistor division can provide 12V voltage and only need to connect AUXFB directly to the COLLECTOR of the external PNP to output. The internal resistor division is that when the voltage at the AUXFB is higher than 9.5V, select 1V built -in magnetic stagnation. For other output voltage, the external resistance division is fed back to AUXFB, as shown in the figure 11B. The output voltage voaux setting is as follows: voltage u003d 1.19V (1+R8/R7) lt; 8V AUXDR LT; 8.5V voltage u003d 12V Auxdr GT; 12V can also be used as an irreversible voltage comparator as shown in Figure 11C. When Auxfb drops below 1.19V, the AUXDR pin will be pulled down. When the AuxDR pin is pulled to 5V as the output of the comparator, it is used to connect to the 1.5 μA internal current source

minimum precautions

minimum connection connection Time, ton (min) is the MOSFET switch at the top of the time when the LTC1436A/LTC1437A can be rotated. It determines the internal time -delay and the required grille charges on the top are on the top of the MOSFET. The low occupation ratio application may be close to this minimum connection time limit. If the duty cycle is lower than the minimum limit, the LTC1436A/LTC1437A will start to skip the cycle. The output voltage will continue to be adjusted, but the ripple current and ripple voltage will increase. Therefore, this limit should be avoided.

LTC1436A/LTC1437A is less than 300ns in the correctly configured application, but increased under low -grained wave current amplitude (see Figure 12). If the application expects to minimize the time limit, the value of a inductor must be low enough to provide sufficient ripple amplitude to meet the minimum request. Determine the correct value, use the following steps:

1. Calculate the connection time when the maximum supply, ton (min) u003d (1/f) (vout/vin (maximum)).

2. Use Figure 12 to obtain a ton (min) of the percentage calculation of peak inductive ripples to achieve the percentage calculation of the required IMAX.

3. Circuit amplitude #8710; il (min) u003d (%in Figure 12) (IMAX) where IMAX u003d 0.1/RSense.

Because the sensitivity of the LTC1436A/LTC1437A is close to the minimum value within the time limit, preventing the mixture magnetic flux is important to be a sensor at the current at the current at the currentThe core of the sensor is used. This noise will minimize by the radial axis of the inductors (see Figure 13).

Efficiency considerations

The efficiency of the switching regulator is equal to the output power divided by 100%by input power. It usually helps to analyze personal losses to determine the greatest progress in limiting efficiency and what changes will produce. Efficiency can be expressed as: efficiency u003d 100% - (L1+L2+L3+...) formula, L1, L2, etc. are a percentage input power of a single loss. Although all dispersion elements in the circuit will cause losses, the four main sources usually occupy the loss in the LTC1436A/LTC1437A circuit: LTC1436A/LTC1437A VIN current, INTVCC current, I2R loss, and upper module MOSFET transition loss. 1Vin current is the DC power supply currently given not includes the electrical characteristic table drive of MOSFET and control current. VIN current causes a smaller ( lt; 1%) loss, which increases with the vehicle recognition number (VIN). 2intVCC current is MOSFET driver and control current. The MOSFET driving current result is from the gate capacitance of the switching power supply. Every time the MOSFET gate is from low to high, a pack of charge DQ moves from INTVCC to the ground. The obtained DQ/DT is a current -to -control circuit current. In continuous mode, igatechg u003d f (qt+qb), where QT and QB are the upper and bottom MOSFETs. For this reason, the adaptive power output stage is switched to the QT MOSFET when the low -current runs. By the output source driver EXTVCC, the driver and control current will be scaled/efficient by the duty cycle -occupied ratio. For example, in the application of 20V to 5V, the INTVCC current of 10 mA is about 3 mAh VIN current. This reduces 10%or more (if the driver is directly from the vehicle identification number) is only a few percent

3.I2R loss is mosFet, the inductance and current diversion. The average output current flowing through the continuous mode flows through L and but is ""chopped"" in the upper part of the main cabin. If the RDS of most field -effect transistors is roughly the same (on), then the resistance of a MOSFET can simply find and use the resistance of L and RSense to obtain I2R losses. For example, if each RDS (on) u003d 0.05 #8486;, RL u003d 0.15 #8486;, RSENSE u003d 0.05 #8486;, the total resistance is 0.25 #8486; This will cause 3%loss when the output current increases from 0.5A to 2A. In high output, I2R loss will lead to a decrease in efficiency.

4. Transitional loss is only applicable to the upper module MOSFET, under high input voltage (usually 20 volts or higher). Transitional loss can be estimated based on the following formulas: Transitional loss u003d 2.5 (VIN) 1.85 (maximum value) (CRSS) (f) Other losses include CIN and COUT ESR dissipation losses, Schottky conductive loss and induction iron heart loss in the dead area, generally account for less than 2%below 2% Total losses.

Check the transient response

The response of the regulator circuit can be viewed by viewing the load transient response. The switching regulator is a cycle current of a step response in the DC (resistor) load. When the loading step occurs, Vout immediately moves the amount of ( #8710; ILOAD) (ESR), where ESR is effective in series resistance. #8710; ILOAD also starts charging or discharge to generate feedback error signals. The regulator circuit subsequently moves to its stable state value. During this recovery time, you can be monitored or ringing bells to represent stability problems. The i -i external component is shown in Figure 1, and the circuit will provide sufficient compensation for most applications.

The second more severe transient is providing bypass electrical containers caused by large ( gt; 1μF) loads caused by connection. This discharge side electric container is effective parallel with COUT, causing VOUT to decrease rapidly. If there is no regulator, if the load switch is low, the driving speed is fast. The only solution is to limit the rise time of the switch drive, so that the load rising time limit is about 25 (CLOAD). Therefore, 10 μF capacitors require a raising time of 250 μs to limit the charging current to about 200mA. Car Precautions: Insert a cigarette lighter As the battery drive device moves, naturally interested in inserting the cigarette lighter to save the battery pack during the operation and even charge it. But before the connection, please note: you are inserting the supply of hell. The main battery line of the car is the source of many harsh potential transients, including loads, anti -battery and dual batteries. Uninstallation is caused by the loosening of the battery cable. When the cable is disconnected, the collapse of the connection of the AC generator will cause a peak of up to 60V to a few hundred millisecond attenuation time. The reverse battery is just like mentioned above. The dual battery is a trailer operator that the 24V cross -connecting the cold engine is faster than 12V. The network shown in FIG. 14 is to protect the DC/DC converter from damaging the car battery line. The two -pole diode prevent current from flowing when the battery is replaced, while the transient suppressor is uninstalled by the input voltage. Note that the transient inhibitors should not be performed during the operation of the dual battery, but the input voltage must still be lower than the breakdown converter. Although the maximum input voltage of the LTC1436A/LTC1437A is 36V, most applications will be MOSFET BVDSS limit to 30V.

Design Example

as a design example, assuming vin u003d 12V (nominal), vin u003d 22V (maximum), vout u003d 1.6V, imax u003d 3A, F u003d 250kHz, RSENSE can immediately calculate COSC:

Reference Figure 3,4.7μH inductor is located in the recommended range. Check the following formulas:

The minimum duty cycle also appeared at the maximum input voltage. In this case, the operation time should be checked to ensure that it does not violate the minimum connection time and cause of the LTC1436A/LTC1437A. The connection time required when the vehicle recognition number (VIN) is:

ΔIL was previously calculated as 1.3A, that is, 43%of the IMAX. It can be seen from Figure 12 that the minimum connection time of the LTC1436A/LTC1437A43%ripple is about 235ns. Therefore, the shortest connection time is sufficient and no cycle will jump. The power consumption of the top MOSFET is easy to estimate. Select Siliconix Si4412DY results input: RDS (open) u003d 0.042 #8486;, CRSS u003d 100pf. During the maximum input, voltage T (estimated value) u003d 50 ° C:

The strictest synchronization requirements When VOUT u003d 0 (that is, short circuit), the N -channel MOSFET circuit appears). In this case, the worst case rose to:

When 0.033 #8486; induction resistor ISC (AVG) u003d 4A, SI4412DY will be The power consumption was increased to 950mW temperature 105 ° C. CIN's rated current is at least 1.5A temperature. When choosing Cout, ESR is 0.03 #8486; output ripples. The output ripple in the continuous mode is the maximum input voltage. The ripple caused by the output voltage ESR is about:

PC board layout check form

When the printing circuit board is arranged, the following content should be used to ensure the LTC1436A /LTC1437A. These projects also have a graphic description shown in Figure 15. Check the layout as follows: Is 1 signal and power grounding? This LTC1436A/LTC1437A signal ground pins must be returned to ( -) plate. The source of the power supply is connected to the source of the MOSFET of the bottom N -channel MOSFET.

2.LTC1436A/LTC1437A Vosense pins to connect to the COUT of the (+) disk? In the adjustable application, the resistor division R1/R2 must be connected to the (+) cover and signal ground. 100PF capacitors should be as close to LTC1436A/LTC1437A.

3.SenseIs the distance between the Sense+wire from the minimum PC record lane?Filter capacitors should be used between Sense+and Sense - to be used for LTC1436A/LTC1437A.

4. Is the (+) board connected to the MOSFET near the upper part?The capacitor provides an AC current for MOSFET.

5. Is the connection between the connection between the unplayed power container ofintVCC is tightly between the INTVCC and the power ground pins?This capacitor carries the peak current of the MOSFET drive.

6. Make the exchange node SW away from sensitive small signal nodes.Ideally, the switch node should be placed at the farthest point of the LTC1436A/LTC1437A.

7. Pllin lines from Boost and SW pins to avoid unnecessary pickup (Boost and SW pin with high DV/DTS).

8.SGND should be used for outer components on PLL LPF, COSC, ITH, LBI, SFB, Vosense and Auxfb pins.

9. If the operation is close to the minimum connection time limit, is it the radial axis of the inductive resistor on the inductive motor?See Figure 13.