Features

Low offset voltage: 10 μV (maximum)

zero drift: 0.05μV/° C (maximum value)

] 0.01-Hz to 10 Hz noise: 1.1 μVPP

Static current: 17μA

Single power operation

# 8226; Power supply voltage: 1.8 V to 5.5 v

Rail -to -rail input/output

Micro -dimensional packaging: SC70 and SOT23

Application

Sensor

Temperature measurement

Electronic scale

medical equipment [123 123 ]

Battery power supply instrument

Handheld test equipment

Instructions

OPAX333 series CMOS operational amplifier uses proprietary automatic calibration technology, It can provide very low offset voltage (maximum 10 μV) and nearly zero drift at the same time and temperature. These micro -precision, high -precision, and low static current exile provides high impedance input. The covarurative range exceeds 100 MVs, and the output of the rail is swinging within the rail 50 MV range. A single power or dual power supply can be used as low as 1.8 V (± 0.9 V) and up to 5.5 V (± 2.75 V). These devices are optimized for low -voltage and single power operations.

The OPAX333 series provides excellent CMRR without the cross -session of the traditional complementary input level. This design brings superior performance to the driving modulus converter (ADC) without reducing differential lineivity.

OPA333 (single version) provides 5-pin SOT-23, SOT and 8-needle SOIC packaging, and OPA2333 (dual version) provides 8-needle VSON, SOIC and VSSOP packaging. All models work at a temperature of -40 ° C to 125 ° C.

Equipment information

(1), please refer to the appointment appendix at the end of the data table.

OPAX333 drawing diagram

Typical features Unless otherwise explained, TA u003d 25 ° C, vs u003d 5 v, CL u003d 0 PF.

Detailed description

Overview

OPAX333 is a zero drift, zero drift, zero drift, drifting, and drift, Low -power consumption, rail input and output computing amplifier. The working voltage of these devices is from 1.8 to 5.5 volts, and the unit gain is stable, which is suitable for extensive common applications. The zero drift architecture provides ultra -low offset voltage and near zero offset voltage drift.

Function box diagram

Feature description

OPA333 and OPA2333 unit gain stable, without unexpected output phase reversal. These devices use proprietary automatic calibration technology to provide low offset voltage and very low time and temperature drift. In order to obtain the minimum offset voltage and accuracy, optimize the circuit layout and mechanical conditions. Avoid the temperature gradient that generates thermoelectric effects in the thermocouple connector that connects different conductors. Eliminate the potential generated by these thermal generated by ensuring that the thermal power on the two inputs is equal. Other layout and design considerations include:

use low thermal coefficient conditions (avoid using different metals).

isolate the component from the power supply or other thermal source.

Shielding the computing amplifier and input circuit to avoid the effect of the airflow (such as the cooling fan).

Following these guidelines can reduce the possibility of junction at different temperatures, which may cause 0.1 μV/° C or higher thermal voltage, depending on the materials used.

Working voltage

OPA333 and OPA2333 The operating power range of the operational amplifier is 1.8 volts to 5.5 volts (± 0.9 volts to ± 2.75 volts). The typical feature part shows parameters with changes in the voltage or temperature of the power supply.

Pay attention to safety

The power supply voltage above +7 V (absolute maximum value) may permanently damage the device.

Input voltage

OPA333 and OPA2333 input a co -mode voltage range exceeded 0.1V. OPA333 is designed to cover the entire range without the troublesome transition zone found in other rail ring amplifiers.

Generally, the input bias current is about 70Pa; however, the input voltage exceeding the power supply will cause excessive current inflow or outflow input pins. If the input current is limited to 10 mA, it can tolerate the instantaneous voltage greater than the power supply. This limit can be easily implemented using the input resistance, as shown in Figure 18.

If the input voltage exceeds the power rail ≥0.5 V, a current limit resistor is required.

Internal offset correction

OPA333 and OPA2333 operational amplifiers use automatic calibration technology. There is a 350 kHz computing amplifier in the signal path. The amplifier uses a proprietary technology for zero correction per 8μs. After power -on, the amplifier requires about 100 μs to achieve the specified VOS accuracy. This design does not overlap or flickering noise.

The output swing of the operation amplifier's negative

For example, in some cases, the voltage from 5 to 0.5 volts is required to reach 0.5 volts. When the output voltage of a single computing amplifier is close to the lower limit, most operational amplifiers will have the problem of approaching the lower limit of the output voltage. A good single power supply amplifier may swing near the place where the single power is grounded, but it will not reach the ground. The output of OPA333 and OPA2333 can be swinged to the ground on a power supply or slightly lower than the ground. This swing is achieved by using another resistor and a negative power supply than an operational amplifier. A drop -down resistor can be connected between the output end and the additional negative power supply, and the output end is pulled below the output value, as shown in Figure 19.

OPA333 and OPA2333 have an output stage. You can use the technology described earlier to pull the output voltage to the negative source rail, or slightly lower than the negative electrode power rail. This technology is only applicable to the output level of certain types. The features of OPA333 and OPA2333 are used to use this technology; the recommended resistance value is about 20 k

Note: This configuration has increased the current consumption of hundreds of Weian.

The accuracy is below 0, as low as 2 millivolves. The limit and non-linearity occur below-2 millions, but after the output is driven to -2 millions again, it can still obtain excellent accuracy. Reducing the resistance of the drop -down resistance can make the computing amplifier swing further below the negative. As low as 10 k resistance can be used to achieve excellent accuracy of as low as -10 MV.

DFN package

OPA2333 is provided in the DFN-8 package (also known as SON). DFN is a QFN package, which is only on both sides of the bottom of the packaging. This lead -free packaging has expanded the circuit board space to the maximum extent, and enhances thermal characteristics and electrical characteristics through a bare pad.

DFN package is very small, the route area is smaller, the thermal performance is improved, and the electrical nature has also been improved. In addition, there is no external lead to eliminate the problem of bending.

DFN packaging can be easily installed using standard PCB assembly technology.

Note

The exposed lead framework mold pad at the bottom of the packaging should be connected to V-Or keep non -connection.

Equipment function mode

OPAX333 device has a single function mode. As long as the power supply voltage is between 1.8 V (± 0.9 V) and 5.5 V (± 2.75 V), the device is powered on.

Application and implementation

Note

The information in the following application chapters is not part of the TI component specification, TI does not guarantee its accuracy or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

OPAX333 series is a unit gain stable, accurate operational amplifier has very low offset voltage drift; these devices have no output phase reversal. The application of noise or high -impedance power supply requires the indulgence capacitor to closer to the device power supply foot. In most cases, 0.1-μF capacitors are enough.

Typical application

High-voltage side voltage-current (V-I) converter

The circuit shown in FIG. 20 is a high-voltage side voltage-current (V-I) converter. Its input voltage is from 0 to 2 volts, and the output current ranges from 0 mAh to 100 mAh. FIG. 21 shows the measurement and transmission function of the circuit. OPA333's low -loss voltage and offset drift help to improve the DC accuracy of the circuit.

Design requirements

The design requirements are as follows:

Power supply voltage: 5 v dc

#8226; Input: 0 V to 2 V DC

Output: 0ma to 100 mAh DC power

Detailed design program

V-I transmission of circuit circuit transmission The function is based on the relationship between the input voltage VIN and the three current influenza resistors RS1, RS2 and RS3. The relationship between VIN and RS1 determines the current of the first stage of design. The current gain from the first to the second level is based on the relationship between RS2 and RS3.

For successful design, please pay close attention to the DC characteristics of the computing amplifier selected for the application. In order to meet the performance goals, the application is due to the computing amplifier with low -dimensional voltage, low -temperature drift, and output between rail output. OPA2333CMOS operational amplifier is a high-precision, 5-UV bias, 0.05-μV/° C drift amplifier, which is suitable for low-voltage and single power operation. The output width is within 50 millivolves. The OPA2333 series uses chopping technology to provide lower initial offset voltage and time and temperature near zero drift. Low -dimensional voltage and low drifting reduce the offset error in the system, so that these devices are suitable for accurate DC controlsystem. OPA2333's rail -to -out -out -of -the -level output of the operating amplifier can fully control the grid of the MOSFET device in the supply track.

TIPD102 gives detailed error analysis, design steps, and additional measurement results.

Application curve

Precision, low level voltage-current (V-I) converter

The circuit shown in FIG. Precision low-level voltage-current (V-I) converter. The input voltage of the converter is 0 V to 5 V, and the output current is 0 μA to 5 μA. Figure 23 shows the measurement and transmission function of the circuit. OPA333's low -loss voltage and offset drift help to improve the DC accuracy of the circuit. Figure 24 shows the calibration error of the entire circuit range.

Design requirements

The design requirements are as follows:

Power supply voltage: 5 v dc

#8226; Input: 0 V to 5 V DC

Output: 0 μA to 5 μA DC

Detailed design program

V-I transmission function based on the input voltage , VIN, RSET, and Instrument Apapa (INA) gain. During the operation, the input voltage removes on the setting resistor that appears in the equal form 1:

The current through the RSET must flow through the load, so IOUT is VSET VSETTT /RSET. As long as the total voltage of RSET and RLOAD does not violate the output limit of the computing amplifier or the input co -mode limit of the INA, iOUT is still a good adjustable current. Set the voltage on the resistor (VSET) is the input voltage removal with INA gain (ie vSET u003d 1V/10 u003d 0.1V). The current is determined by VSET and RSET, as shown in equivalent 2:

Tipd107 gives detailed error analysis, design steps and additional measurement results.

Application curve

Composite player

The circuit shown in FIG. 25 is a composite amplifier to drive the benchmark on ADS8881. OPA333 provides excellent DC accuracy. THS4281 allows the output of the circuit to quickly respond to the typical SAR data converter refer to the input transient current requirements. The ADS8881 system has optimized THD and obtained the measured performance of -1110 decibels. The linearity of ADC is shown in Figure 26.

Design requirements

The design requirements of this block design are as follows:

System power supply voltage: 5 v dc

ADC power supply voltage: 3.3 V DC

ADC sampling rate: 1 msps

ADC reference voltage (vREF): 4.5 v DC

ADC input Signal: The amplitude is VPK u003d 4.315 V (–0.4 DBFS to avoid cutting waves) and frequency fIN u003d 10 kHz. Input signal Apply to each differential input of ADC

Detailed design program

] The two main design considerations that maximize the performance of high -resolution SAR ADC performance are input drives and reference drive design. The circuit includes key analog circuit blocks, input drives, anti -hybrid filters and reference drives. Each simulation circuit block should be carefully designed according to the ADC performance specifications to maximize the distortion and noise performance of the data acquisition system at low power consumption and maximize the maximum extent. The figure includes the most important specifications of each individual simulation. This design systematically discusses the design of each analog circuit block to achieve 16 digits, low noise and low -distortion data collection system for 10 KHz sinusar input signals. The first step of design needs to understand the requirements of extremely low distortion input driver amplifiers. This understanding helps determine a proper input driver configuration and select an input amplifier to meet the system requirements. The next important step is to design anti -hybrid RC filters to attenuate ADC backwitching noise while maintaining the stability of the amplifier. The final design challenge is to design a high -precision reference drive circuit, which will provide the required value VREF and low offset, drift and noise contribution.

When designing a very low -income data collection module, it is important to understand the source of non -linear. ADC and input drives introduce non -linearity in the data collection block. In order to achieve the minimum distortion, the input drive of high -performance SAR ADC must have distortion compared to ADC distortion. This parameter requires that the input drive distortion is 10 dB lower than the ADC THD. This strict requirement to ensure that the total harmony of the system does not really exceed -0.5 dB.

Therefore, the important thing is to choose a amplifier that meets the above standards to avoid the restriction of the system THD by the input drive. The non -linear dependency of the amplifier in the feedback system depends on the available ring gain. TIPD115 gives detailed error analysis, design steps, and additional measurement results.

Application curve

System Example

Temperature measurement application

FIG. 27 shows temperature measurement.

Application of Single Transport Bridge Bridge amplifier

FIG. 28 shows the basic configuration of the bridge amplifier.

Low -voltage side current monitor application

FIG. 29 shows a low -side current diversion monitor. RN is an operating resistor used to isolate the noise isolation of ADS1100 from the digital I2C bus. ADS1100 is a 16 -bit converter; therefore, the accurate benchmark is essential for maximum accuracy. If you do not need absolute accuracy, and the 5V power supply is stable enough, you can omit Ref3130.

Note: 1%of the resistance provides sufficient co -mode suppression under a small grounding carrier error.

Other applications

Figure 30 to FIG. 33 shows the idea of u200bu200bother applications.

(1), Qina rated transportation power supply supply (that is, 5.1V OPA333).

(2), a current limit resistor.

(3), select Zina bias resistor or dual N-MOSFET (FDG6301N, NTJD4001N or SI1034).

(1), other meter amplifiers can also be used, such as INA326, it has lower noise, but higher static current.

Power suggestion

OPAX333 is stipulated at 1.8 V to 5.5 V (± 0.9 V to ± 2.75 V); many specifications are suitable for -40 ° C to 125 ° C. The parameters of typical features show a significant difference in working voltage or temperature.

Pay attention to safety

The power supply voltage greater than 7 V may permanently damage the device (see the absolute maximum rated value).

TI is recommended to place 0.1-μF bypass electrical containers near the power pins to reduce the coupling error of noise or high impedance power supply. For more information on the side electric container, see the layout part.

Layout

layout guide

Total plane layout guide

Pay attention to good layout practice. Keep the line short. If possible, use the printing circuit board (PCB) ground plane. The surface installation component is as close to the device pin as much as possible. Place a 0.1-μF capacitor next to the power pins. These guidelines are applied to the entire simulation circuit to improve performance and provide benefits, such as reducing electromagnetic interference (EMI) sensitivity.

OperationThe amplifier's sensitivity to RF interference (RFI) is different. RFI can usually be recognized as a offset voltage or DC signal level change with the change of the RF signal. OPA333 is specially designed to minimize the sensitivity to radio frequency interference. Compared with the previous generation of equipment, its sensitivity is very low. Strong radio frequency field may still lead to changes in offset levels.

DFN layout guide

Packing DFN packaging on the exposed leading frame mold pads on the PCB hot pad on PCB. The layout of the mechanical data table is at the end of this figure. According to the requirements of the assembly process, the layout may be improved. The mechanical drawings at the end of this data table list the physical dimensions of packaging and pads. The five holes in the platform pattern are optional, which is used to connect the radiating pores of the leading frame of the lead frame and the PCB heat sink area.

In temperature circulation, keys, packaging cutting, and similar board tests, welded exposed pads have significantly improved board -level reliability. Even in low -power applications, naked pads must be welded to PCB to provide structural integrity and long -term reliability.

layout example