feature

Internal Avalanche Rugged FET consumes only 0.65W at 240V AC and 0.3W load Advanced Burst Mode Operation Low EMI Frequency Modulation Accurate Fixed Operating Frequency Internal Startup Circuit Pulse-by-Pulse Current Limit Abnormal Over Current Protection Over Voltage Protection Overload Protection Internal Thermal Shutdown function Auto-restart mode Under-voltage lockout Low operating current (3MA) Adjustable peak current limit Built-in soft-start

application

Switching Power Camera Adapters for VCRs, SVRs, Set-Top Boxes, DVDs and DVCDs for Switching Power Printers, Faxes and Scanners

describe

The fsdx0265rn (x stands for m, h) is an integrated pulse width modulator (pwm) and sensing fet designed for high performance offline switching power supplies with minimal external component provisioning (SMP). Both devices are integrated high voltage power switching regulators that combine avalanche rugged sensing FETs and current mode pulse width modulation control blocks. Features of the integrated pwm controller include: fixed frequency oscillator for reduced EMI modulation, undervoltage lockout (uvlo) protection, leading edge blanking (leb), optimized gate on/off driver, thermal shutdown (TSD) Protection, Abnormal Over Current Protection (AOCP) and Temperature Compensated Source of Precision Current Loop Compensation and Fault Protection Circuitry. When combined with discrete mosfet and controller or rcc switching converter solutions, the fsdx0265rn reduces total component count, design size, weight and time to improve efficiency, productivity and system reliability. Both devices are a basic platform well suited for cost-effective design of flyback converters. Note: 1. Typical continuous power in a non-vented enclosed adapter with adequate drain pattern or heat sink measured at ambient temperature of 50°C. 2. Open Frame Maximum Practical Continuous Power Design Heat Sink at 50°C Environment with Sufficient Drainage. three. 230 VAC or 100/115 VAC doubles.

Function description

1. Startup: In previous generations of Fairchild Power Switch (FPSTM) the VSTR pin had an external resistor to the DC input voltage line. In this generation, the start-up resistor is powered by an internal high voltage current source and the switch voltage VCC is turned off after 15 minutes of power supply is higher than 12V. If VCC drops below 8V.

2. Feedback Control: The fsdx0265rn uses current mode control as shown. Optocouplers (such as h11a817a) and shunt regulators (such as ka431) are commonly used to implement feedback networks. Comparing the feedback voltage to the voltage across the sensor resistor plus the offset voltage controls the switching duty cycle. When the KA431 exceeds the 2.5V internal reference power H11A817 A LED current increases, thereby reducing the feedback voltage and reducing the duty cycle. This event occurs when the input voltage increases or the output load decreases. three. Leading Edge Blanking (LEB): At the moment when the internal sensing FET is energized, there is usually a high current spike in the sensing FET, which is caused by the capacitance on the primary side and the reverse recovery of the rectifier diode on the secondary side. Excessive voltage on the RSENSE resistor can result in incorrect feedback operation control in current mode. To counteract this effect, fpstm uses an edge blanking (LEB) circuit. This circuit suppresses the short time comparator (TLEB) opening after the PWM sensing FET is activated

4. Protection Circuits: FPSTM has several protection circuits such as overload protection (OLP), over voltage protection (ovp), abnormal over current protection (AOCP), under voltage lockout (UVLO) and thermal shutdown (TSD). Since these protection circuits are fully integrated inside the integrated circuit with no external components, reliability is improved without increasing cost. Once a fault occurs, the switch is terminated and the detection FET remains off. This causes VCC to drop. When VCC reaches the uvlo stop voltage, 8v, the protection resets the internal high voltage current source to charge the VCC capacitor through the VSTR pin. When VCC reaches the UVLO startup voltage of 12V, the FPSTM resumes normal operation. In this way, auto-restart can alternately enable and disable the switching of the power-sensing FET until the fault is eliminated. 4.1 Overload Protection (OLP): Overload is defined as load current exceeding a preset level due to unexpected events. In this case, the protection circuit should be activated to protect the SMPS. However, even when the switching power supply is operating normally, overloading during the load transition can activate the protection circuit. To avoid this undesired operation, overload protection circuits are designed to determine whether this is a transient condition or an overload condition as specified. Combined with the IPK current limit pin (if used) the current mode feedback path will limit the maximum PWM duty cycle when the current in the sensing FET reaches cycling. If the output consumes more than this maximum power, the output voltage (vo) will drop below the set value. This reduces the current through the optocoupler LED, it also reduces the current through the optocoupler transistor, which increases the feedback voltage (vfb). If VFB exceeds 3V, the feedback input diode is blocked and the 5UA IDELAY current source begins to slowly charge the CFB until it reaches VCC. Under this condition, VFB continues to increase until it reaches 6V, at which point the switching operation is terminated as shown. The shutdown delay time is the time it takes to charge the CFB from 3V to 6V with 5uA.

4.2 Thermal crack (TSD): The sensory and sensory control IC is integrated, making it easy to control the temperature of the sensory sensor. Thermal shutdown activates Cfb from 3V to 6V with 5uA when temperature exceeds about 140°C.

Even though the FPSTM has OLP (overload protection) and pwm feedback in current mode, these are not enough when the secondary diode is shorted or the transformer pin is shorted. In addition to start-up, soft-start is also activated on each restart attempt during automatic restart and on restart after latch mode activation. This FPSTM has an internal AOCP (Abnormal Over Current Pro Protection) circuit as shown. When the gate is opened a signal is applied to the power sense FET, the AOCP block is enabled and monitors the current through the sense resistor. Then compare the voltage across the resistor with the preset AOCP level. If the sense resistor voltage is greater than the AOCP level, a pulse by pulse triggers the AOCP regardless of the uncontrollable LEB time. Here, one by one AOCP stops working within 350ns after the induction FET is activated. 4.4 Over Voltage Protection (ovp): When the secondary side feedback loop or feedback loop fails due to the open circuit caused by the solder defect, the current passing through the optocoupler transistor is almost zero. The VFB then ramps up in a manner similar to an overload situation, forcing a preset maximum current to the switching power supply until the overload protection kicks in. Because excess energy is supplied to the output, the output voltage can exceed the rated voltage before overload protection activates, resulting in a second side. To prevent this from happening, a voltage protection (ovp) circuit is used. In general, VCC is proportional to the output voltage, which FPSTM uses instead of directly monitoring the output voltage. If VCC exceeds 19V, the ovp circuit is activated, resulting in termination of the switching operation. To avoid accidental activation of the ovp during normal operation, the vcc should be properly designed to be below 19V. 5. Soft-start: FPSTM has an internal soft-start circuit which increases the feedback voltage and sensitivity to slow FET current after start-up. A typical soft-start time is 15 ms, as shown in the start-up phase. The pulse width of the power switch is gradually increased to establish the correct operating conditions of the transformers, inductors and capacitors. The voltage on the output capacitor is incremented in order to successfully establish the desired output voltage. It also helps prevent transformer saturation and reduces stress on the secondary diode.

The leakage inductance clamp is provided by R1 and C8 to keep the drain voltage below 650V under all conditions. Resistor r1 and capacitor c8 are chosen so that r1 dissipates power to prevent the drain voltage from rising through the leakage inductance. The FM characteristics of the fsdl0165rn allow the circuit shown to satisfy CISPr2ab with simple EMI filtering (C1, LF1 and C2) and output grounding. The second part goes through D12 , D13, D14, and D15. Diode D15 for the 3.4V output is a Schottky diode to maximize efficiency. The diode D14v output of 5 is pn type, concentrating the 5v output at 5v3.3V and the 5V output voltage requires two parallel capacitors to meet the ripple current requirement. Switching noise filtering is provided by l3, l2 and l1. Resistor r15 prevents peak charging of the 23V output at light loads. The output is regulated by the secondary reference ( TL431 ) voltage. Both the 3.3 V and 5 V outputs are sensed through R13 and R14. Resistor r22 provides bias for the tl431 and r21 sets the overall dc gain. Resistors r21, c209, r14 and r13 provide loop compensation.