functional application
10 Fully Differential Input AC Motor Speed Control
5-way synchronous sampling three-phase power control plus 2 synchronous sampling*
Channel Vibration Analysis
3 simultaneous 12-bit ADCs
12.8s throughput digitally selectable input range ±5V power supply IUP/N
Serial digital input/output A1P/NADOUT1
7 signatures, 3 digital signatures A2P/N Programmable Window Comparator IVF/Embryo Transfer Description B1P/NADOUT2
B2P/N
The vecana01 consists of three 12-bit analog-to-digital converters with five IWP/N in front
Operational track-and-hold amplifier and multiplexer for 10 differential inputs. The ADC has an analog serial output for high-speed data transfer and data processing. AN1P/NAdOut3AN2P/NAN3P/N
Vecana01 also offers programmable gain amplifiers with programmable gains of 1.0V/V, 1.25V/V, 2.5V/V and 5.0V/V. Channel selection and gain selection can be re-output by serial input control word selection. Adek Simula maintained a high pass rate. - Adkov is currently switching to busy timings. COMP This section also contains an 8-bit digital-to-analog converter - a converter whose digital input is provided as part of the input control word

Functional diagram.
The vecan01 is a triple 12 bit sar a/d converter powered by dual ±5v supplies. This section includes three 12-bit successive approximation ADCs, 10 fully differential input multiplexers, 5 differential input synchronous sample-and-hold amplifiers, and two asynchronous sample-and-hold amplifiers. It communicates via three simultaneous SPI/SSI serial outputs and one input port. The vecana01 runs on an external clock, which also determines the output data rate.
multiplexer
The vecana01 has multiple input multiplexers to select the desired analog inputs and connect the appropriate sample and hold outputs to pgas and a/d converters. The decoder receives its input from the input setup register and drives the mux. The input multiplexer can accept fully differential or single-ended signals. The analog signal is differentially sampled and held through the PGA all the way to the input of the A/D converter. This provides the best noise rejection.
Sample preservation
The vecana01 contains seven sample-and-hold amplifiers. Five of them (SH1 to SH5) are sampled simultaneously and have their sample and hold timing synchronized internally. Three sample and hold (sh1, sh3, and sh5) are connected to the input multiplexer so that they can provide simultaneous sampling for all channel inputs. Furthermore, sh2 and sh4 simultaneously sample the third input of their channel (a2 and b2, respectively). This is useful in motor control applications where a1 and b1 are the quadrature inputs of one position sensor and a2 and b2 are the quadrature inputs of the second position sensor. In this application, it is desirable to simultaneously sample the quadrature inputs of a given position sensor (even if they are converted in consecutive conversion cycles) in order to capture their values at the same axis position. vecana01 also has limited asynchronous sampling capabilities. The sampling of sh6 and sh7 is asynchronously controlled by the control signal npsh. This allows two inputs, on channel 1 and channel 2, to be sampled asynchronously from another sample-and-hold timing. This is useful in motor control applications where the two inputs per channel need to be sampled asynchronously to a reference point.

Timing diagram.
The Vecana01 contains three signal channels, each with a 12-bit A/D converter output. The A/D converters work synchronously, and their serial outputs occur simultaneously (Table 9 shows the analog input/digital output relationship). The programmable gain amplifier is located before the A/D converter (the gain selection information is given in Table 9). For channel 1 and channel 2, the PGA is valid for all three analog inputs. For the third channel, the pga only changes the gain of the iw input. Regardless of the gain selection value, the inputs an1, an2, and an3 are connected to a/d converter 3 with a fixed gain of 1.0v/v.
voltage reference
The Vecana01 contains an internal 2.5V voltage reference. It can be obtained externally through the output buffer amplifier. If you need to use an external reference, you can connect one at the refin pin. The output resistance of this pin to the external reference voltage is typically 7kΩ. This then overrides the internal 2.5V reference and connects to the A/D converter. It can also be used as a buffered output for the re-output.
The reference voltage should be buffered on the Refin pin and the RefOut pin with external capacitors (~2.2µf) as close as possible to the pins.

digital to analog converter
The 8-bit DAC provides 256 output voltage levels from 0V to 2.499V (see Table I for the input/output relationship). The dac is controlled by the dac input section of the input settings word. The dac input portion of the word is selected into the dac at the end of the conversion cycle

Analog to Digital Converter Architecture
The a/d converter is a 12-bit successive approximation type implemented with a switched capacitor circuit.
clock rate
The clock for A/D converter conversion is provided externally from the ADCLK pin. The typical clock frequency for the specified accuracy is 1.25MHz. This results in a full conversion cycle (S/H acquisition and A/D conversion) of 10.4 microseconds.
input Output
The vecana01 is designed for bipolar input voltages and uses a two's complement digital output code. Each A/D converter has a programmable gain function. This changes the converter's full-scale analog input range and analog resolution.
Differential and Common Mode Input Voltages
The vecana01 is designed with a fully differential signal path from the multiplexer input to the a/d converter input. This is done to provide superior high frequency noise rejection. As with most differential input semiconductor devices, there is a compound limit to the combination of differential input voltage and common-mode input voltage. This problem is slightly complicated by the fact that most analog inputs can be affected by the programmable gain function