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2022-09-23 11:51:44
The AD8079 is a dual low-power high-speed buffer
Product Description
The AD8079 is a dual low-power high-speed buffer designed to operate from ±5 V supplies. The pins of the AD8079 provide excellent input and output isolation compared to the traditional dual amplifier pin configuration. The AD8079 has two AC ground pins, which separate the input and output, and can achieve very low crosstalk, less than -70 dB, at a frequency of 5 MHz.
In addition, the AD8079 contains gain setting resistors that are factory set to G = +2.0 (A grade) or Gain = +2.2 (B grade), allowing circuit configuration with minimal external components. A Class B gain of +2.2 compensates for system gain losses by providing a single-point trim. Using active laser trimming of these resistors, the AD8079 ensures tight control of gain and channel gain matching. With its performance and configuration, the AD8079 is ideal for driving differentials.
cables and transformers. Its low distortion and fast resolution are ideal for buffering high-speed dual or differential a-to-d converters.
The AD8079 has a unique transimpedance linearization circuit. This enables it to drive video loads with excellent differential gain and 0.01% and 0.02° phase performance at just 50 MW per amplifier. It features a gain flatness of 0.1db to 50mhz. This makes the AD8079 ideal for professional video electronics such as cameras and video switches.
The AD8079 provides low power (vs=?5V) of 5mA/amp and can operate on a single +12V supply while delivering over 70mA of load current. All are offered in a small 8-pin SOIC package. These features make this amplifier ideal for portable and battery-powered applications where size and power are critical.
Excellent bandwidth of 260mhz and slew rate of 800v/µs make the ad8079 very useful in many general purpose high speed applications requiring dual ±3v to ±6v supplies. The AD8079 can be used over the industrial temperature range of -40°C to +85°C.
Absolute Maximum Ratings1
voltage. …………………………………… 12.6 volts
Internal power consumption 2
Small Outline Package (R). ……………… 0.9 Watts
Input voltage. …………………………………………±VS
Output short circuit duration…………………….Observe the power derating curve and store the temperature range. ………………-65°C to +125°C
Operating temperature range (Class A). …–40°C to +85°C lead temperature range (10 sec soldering). ……+300°C
Stresses higher than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and does not imply that the functional operation of the device under these or any other conditions is higher than that shown in the operating section of this specification. Long-term exposure to absolute maximum rating conditions may affect device reliability. 2 Specifications apply to devices in free air: 8-pin SOIC package: θ = 160°C/watt.
Maximum power consumption
The maximum power that the AD8079 can safely dissipate is limited by the rise in junction temperature. The maximum safe connection temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic (approximately +150°C). Temporarily exceeding this limit may result in changes in parametric performance due to changes in the stress the package imposes on the mold. Junction temperatures exceeding +175°C for extended periods of time can cause device failure.
be careful
Electrostatic discharge sensitive devices. Electrostatic charge up to 4000 volts
Accumulates on human body and test equipment and can discharge without detection. warn!
Although the AD8079 has proprietary ESD protection circuitry, permanent damage to devices exposed to high-energy electrostatic discharges may occur. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
theory of operation
The AD8079 is a dual current feedback amplifier internally configured for a gain of +2 (AD8079A) or +2.2 (AD8079B). Internal gain setting resistors effectively remove any parasitic capacitance associated with the inverting input pin, which is responsible for the AD8079's excellent gain flatness response. Carefully chosen pins greatly reduce crosstalk between each amplifier. Each amplifier can drive up to four 75Ω back-end video loads with typical differential gain and phase performance of 0.01%/0.17°, respectively. The AD8079B has a gain of +2.2 and can be used as a single-gain trim element in the video signal chain. Finally, the AD8079A/B combined with our AD8116 crosspoint matrix provides a complete turnkey solution for video distribution.
Printed Circuit Board Layout Considerations For wideband amplifiers, PC board parasitics can affect the overall closed-loop performance. If you are going to use the ground plane as the signal line on the same side of the board, you should leave a space (5 mm min) around the signal line to minimize coupling. less than the row length, 5 mm is recommended. In the case of long coaxial cables, drive, dispersion and loss must be considered.
power bypass
Proper power supply bypassing is critical when optimizing the performance of high frequency circuits. The inductance in the power line can form a resonant circuit, which can create peaks in the amplifier's response. Additionally, if large current transients must be supplied to the load, bypass capacitors (typically greater than 1µf) are required to provide the best settling time and lowest distortion. A parallel combination of 4.7µf and 0.1µf is recommended. Some brands of electrolytic capacitors require a small series damping resistor ≈ 4.7Ω for best results.
DC Error and Noise
In a current feedback amplifier, there are three main noise and offset terms to consider. For offset error, please refer to the formula below. For noise error, the term is the square root to give the net output error. In the circuit below (Figure 24), they are the input offset present at the output (vio) multiplied by the noise gain of the circuit (1+rf/ri) and the non-inverting input current (ibn×rn) is also multiplied by Taking the noise gain, and inverting the input current, when dividing between rf and ri and then multiplying by the noise gain always appears that the s output is ibn × rf. The input voltage noise of the AD8079 is as low as 2nV/√Hz. At low gain, although the reverse input current noise multiplied by RF is the dominant noise source. Careful layout and device matching help improve the offset and drift specifications of the AD8079 compared to many other current feedback amplifiers. Typical performance curves and the equations below can be used to predict the performance of the AD8079 in any application.
RF = for AD8079A, ri = 750Ω; RF = 750Ω, for AD8079B, ri = 625Ω.
Runs as a video line driver
The AD8079 is designed to provide excellent video line drive performance. The important specifications of differential gain (0.01%) and differential phase (0.02°) meet the most demanding HDTV requirements for driving a video load with each amplifier. The AD8079 also drives four back-end loads (two each), as shown in Figure 26, with equally impressive performance (0.01%, 0.07°). Another important consideration is isolation between loads in multi-load applications. The AD8079 provides more than 40 dB of isolation at 5 MHz when driving two 75Ω back-end loads.
Single-Ended-to-Differential Driver Using the AD8079 The two halves of the AD8079 can be configured to create a single-ended-to-differential high-speed driver with a -3dB bandwidth in excess of 110MHz, as shown in Figure 27. Although the individual op amps are current-feedback with internal feedback resistors, the overall architecture produces circuits with properties typically associated with voltage-feedback amplifiers, while offering the inherent speed advantages of current-feedback amplifiers. Furthermore, the gain of the circuit can be changed by changing a single resistor, rf, which is usually not possible in a two-op amp differential driver.
The current feedback characteristics of the op amp, in addition to enabling a wide frequency band, provide over 3 V pp for each output at 20 MHz driven into a 20 Ω load. On the other hand, the voltage feedback characteristic provides a symmetrical high impedance input and allows the use of reactive components in the feedback network.
The circuit consists of two op amps, each configured as a unity gain follower with a 750Ω feedback resistor between the output of each op amp and the inverting input. The output of each op amp has a 750Ω resistor connected to the inverting input of the other op amp. Therefore, each output drives another op amp through a unity gain inverter configuration. By connecting the two amplifiers as a cross-coupled inverter, their outputs are freely equal and opposite, ensuring that the output common-mode voltage is zero.
With this circuit configuration, the output common mode signal is reduced. If one output is slightly higher, the negative input of the other op amp drives its output slightly lower, thus maintaining the symmetry of the complementary outputs and thus reducing the common-mode signal.
The resulting architecture offers several advantages. First, the gain can be changed by changing a resistor. Changing rf or rg will change the gain as in an inverting op amp circuit. For most types of differential circuits, more than one. Resistors must be replaced to change gain and maintain good CMR.
Reactive elements can be used in the feedback network. This is in contrast to current feedback amplifiers that are limited to using reactive elements in the feedback. The circuit requires about 1.3pf of capacitance in parallel through the RF to optimize peaking and achieve a bandwidth of 110MHz above -3db. The peaks shown by the circuit are very sensitive to the value of this capacitor. The order of magnitude of the pickup antenna parasitic in the board layout will affect the frequency response and the required value of the feedback capacitors, so a good layout is essential. The selection of shunt capacitors is also critical. High-Q microwave chip capacitors have the best performance.
Layout Considerations
The specified high-speed performance of the AD8079 requires careful attention to board layout and component selection. Proper RF design techniques and selection of low parasitic components are mandatory. The PCB should have a ground plane covering all unused ports on the component side of the board to provide a low impedance ground path. The ground plane should be kept away from the area near the input pins to reduce stray capacitance. Chip capacitors should be used for power supply bypassing. One end should be connected to the ground plane and the other end should be within 1/8". each power pin. Another large (4.7µf–10µf) tantalum electrolytic capacitor should be paralleled, but not necessarily so close, to provide current at the output for fast, large signal changes. Long signal paths (greater than 1 inch) should use stripline design techniques. They should be designed with a characteristic impedance of 50Ω or 75Ω and properly terminated at each end.