The DAC7616 is a quad, serial input, 12-bit, voltage output digital-to-analog converter (DAC) with guaranteed 12-bit monotonic performance over the -x9640°C to +85°C temperature range. Asynchronous reset clears all registers to intermediate (800H) or zero-scale (000H), selectable by the RESETSEL pin. The device operates from a single +3V supply.

Low power consumption and small size make the DAC7616 ideal for process control, data acquisition systems, and closed-loop servo control. The device is available in SO-16 or SSOP-20 packages and operates from +x9640°C to +85°C.

The DAC7616 architecture is a typical R-2R ladder configuration followed by an op amp used as a buffer. Each DAC has its own R-2R ladder network and outputs op amps, but all have a common reference voltage input. The minimum output voltage "zero scale" and the maximum output voltage "full scale" are set by the external reference voltages (VREFL and VREFH respectively). The digital input is a 16-bit serial word containing the 12-bit DAC code and a 2-bit address used to select one of the four DACs (the two remaining code bits are unused). The converter can be powered from a single +3V supply. Each device provides a reset function that diately sets the output voltage of all DACs and internal registers to zero-scale (code 000H) or mid-scale (code 800H). The state of the RESETSEL pin selected by this reset code (LOW=000H, HIGH=800H). Figure 1 shows the basic operation of the DAC7616.

figure 1

Analog output

The output of the DAC7616 can swing to ground. Note that the settling time of the output op amp will be longer with voltages very close to ground. Also, care must be taken when measuring zero-scale error. If the output amplifier has a negative offset, the output voltage may not be used to change the output voltage of the first few digital input codes (000H, 001H, 002H, etc.) because the output voltage cannot go below ground. The behavior of the output amplifier can be in some critical applications. In a short-circuit condition (DAC output short to VDD), the output amplifier can sink more current than it can source.

reference input

The output of each DAC is a minimum equal to VREFL plus a small offset voltage (essentially, the offset output op amp). The maximum output is equal to VREFH-1LSB with a similar offset voltage applied. The current going into the reference input depends on the output voltage of the DAC and can vary from a few microamps to about 0.4mA. Bypass the reference voltage age or voltage with a 0.1µF capacitor placed as close as possible to the DAC7616 package.

Table 1

digital interface

The basic timing of the DAC7616 is provided in Figure 2 and Table 1. The interface consists of a serial clock (CLK), serial data (SDI), and a load DAC signal (LDAC). In addition, the Chip Select (CS) input can be used to enable serial communication when there are multiple serial devices. An asynchronous reset input (RESET) is provided to simplify start-up conditions, periodic resets, or to an emergency reset known state.

figure 2

The DAC code and address are provided through a 16-bit serial interface, as shown in Figure 2, when bit 2 of the DAC register is selected, when LDAC goes low, it will be updated (see Table 2). The next two bits are unused. The last 12 bits are the DAC code that is first set, the most significant bits. Note that CS and CLK are combined with an OR gate whose output controls the serial-to-parallel shift register internally to the DAC7616. Both of these inputs are completely mutually variable. Also, care must be taken to use the status of CLK when CS rises at the end of a serial transfer. If CLK is LOW when CS rises, the OR gate will provide a rising edge to the shift register, shifting an additional bit of internal data. The result will be incorrect data and possible selection of the wrong DAC.

Table 2