Features

256 -bit

TTP (two programming) settings and forgotten resistance setting allows secondary opportunities to be permanently programmed

In OTP (disposable programming) activation activation Unlimited adjustment before

OTP coverage allows the preset value defined by the user for dynamic adjustment

end resistance: 2.5 k , 10 k , 50 k #8486 ; 100 k

Compact MSOP-10 (3 mm × 4.9 mm) packaging

Quick stability Time: TS u003d 5 μs

Wiper register of the wiper register Completely read/write

Power -powered preset to medium range

additional package address decoding pin AD0 and AD1

Single power supply 2.7 V to 5.5 V

Low temperature coefficient: 35 PPM/° C

Low power consumption, maximum IDD u003d 6μA

Wide operating temperature: -40 ° C to+125 ° C

Provide an evaluation board to provide an evaluation board And software

Software replaced μc

Application

System calibration in the factories programming application

Electronic level setting

New design MEChanical Trimmers #174; Alternative

permanent factory PCB settings

Sensor adjustment of pressure, temperature, and location,

chemical and optical sensor

] RF amplifier partial pressure

Auto electronic adjustment

gain control and offset adjustment Overview AD5170 is a 256 -bit, two -time programmable (twice (twice TTP) Digital potentiometer 1 uses melting connection technology to set two opportunities in permanent programming resistance settings. For users who do not need to program digital potentiometers in the memory, OTP is an economic and efficient alternative of EEMEM. This device has the same electronic adjustment function as a mechanical potentiometer or variable resistor, and has enhanced resolution, solid reliability and excellent low temperature coefficient performance. AD5170 uses 2 lines, I2C #174; compatible digital interface programming. Unlimited adjustments are allowed before the permanent (actually two opportunities) is set. During OTP activation, a permanent sweeping fuse command will freeze the position of the wiper (similar to placing epoxy resin on a mechanical trimmer). and the traditional OTP digital electricityDifferent positions, the AD5170 has a unique temporary OTP coverage function, which can be made new adjustments even after fuse melting. However, under the subsequent power conditions, TP settings will be restored. This feature allows users to regard these digital potentiometers as a programmable preset -loss potentiometer.

For applications programming AD5170 in the factory, the simulation device provides device programming software on Windows NT #174;, 2000 and XP #174; operating system. The software effectively replaces any external I2C controller, thereby increasing the time of listing of the user system.

Function box diagram

Typical performance features

Test circuit

Figure 24 to Figure 29 illustrates the test circuit of the test condition used in the specifications of the product specifications.

Operation theory

AD5170 is a 256 -digit -controlled variable resistor (VR), which uses melting Silk connection technology realizes the memory of the resistance settings.

The internal power is preset and placed the wiper in the middle scale during power. If the OTP function is activated, the device will be powered on the permanent setting of users.

Disposal programming (OTP)

Before OTP activation, the AD5170 presets the medium scale during the initial power period. After the wiper is set to the required position, the T position can be set as high, and appropriate encoding (see Table 7 and Table 8) and a VDD U OTP permanently set the resistor. Please note that the fuse connection technology requirements of the AD517X series digital potentiometer 5.25 V and 5.5 V to melt the fuse to achieve a given non -easy loss settings. On the other hand, VDD can be 2.7V to 5.5V during operation. Therefore, the system power supply below 5.25 V requires external power supply for disposable programming. Please note that the user allows only to try the fuse once. If the user fails to detonate the fuse during the first attempt, the structure of the fuse may change, so no matter what the energy applied in subsequent events, the fuse may never melt. For details, please refer to the precautions of the power and equipment.

The equipment control circuit has two verification bits E1 and E0, which can be read back to check the programming status (see Table 7). Users should always read the verification bit to ensure the correct melting of the fuse. After the fuse is fused, all fuse locks are enabled when they are then powered on; therefore, the output and storage settings correspond to. Figure 30 shows detailed skillsFragrant diagram.

Programming variable resistance and voltage

Voltizer operation

The RDAC nominal resistor between terminal A and terminal B is 2.5 k , 10 k , 50 k and 100 k . The nominal resistor (RAB) of VR has 256 contacts that can be connected through the wiper terminal, plus the B terminal contact. The 8 -bit data in the RDAC memory is decoded to select one of the 256 possible settings.

Assuming that the first connection of the wiper starts from the B terminal of the data 0x00 with 10 k parts. Because the wiper contact resistance is 50 therefore, this kind of resistance to the minimum 100 (2 × 50 ) is generated between terminal W and terminal B. The second connection is the first tap, corresponding to 139 (RWB u003d RAB/256+2 × RW u003d 39 +2 × 50 ) For data 0x01. The third connection is the next tap point, representing the 178 (2 × 39 +2 × 50 ), which is pushed by this type. Every time a LSB data value is added, the wiper will move up along the resistor's ladder until the last separation point is at 10100 (RAB+2 × RW).

The general equation of the digital programming output resistance between the terminal W and the terminal B is:

Among them, D It is the decimal value of the binary code loaded to the 8 -bit RDAC register. The RAB is the end resistance of the end to the end -to -end resistance.

In short, if the RAB u003d 10 k and the A terminal is opened, the output resistance of the RDAC lock code RWB is set to Table 5.

Note that under the condition of zero scale, there is a limited wiper resistor with 100 It should be noted that the current between the terminal W and the terminal B of this state is limited to the maximum pulse current of not more than 20 mA. Otherwise, the internal switch contact may be degraded or damaged.

Similar to the mechanical potential meter, the RDAC resistor between the wiper terminal W and the terminal A also generates digital control complementary resistance RWA.

When using these terminals, the B terminal can be opened. Set the resistance value for the RWA starting from the maximum value of the resistance, and decreases as the data value loaded in the lock memory. The general equation of this operation is:

For RAB u003d 10 k and the B -terminal opening road, set the following output resistance RWA for the RDAC locking code, as shown in Table 6.

The typical device matches the device to depend on the process batch, and there may be as high as ± 30%. Because the resistance element is processed by thin film technology, RAB has a very low temperature coefficient of 35 PPM/° C with temperature changes.

Programming potential scorer

Voltage output operation

Digital potentiometer can easily generate an input from a to B from the wiper to B and wiper to A The voltage is a proportional pressure division. Unlike VDD to GND's polarity (must be positive), the voltage between A – B, W -A and W -B can be arbitrary polarity.

If the effect of the wiper resistance is ignored to obtain the approximity value, connect the A terminal to 5 V, connect the B terminal to ground, and generate a from 0 at the wiper to B from 0 The output voltage of V to 1 LSB is less than 5 V. Each voltage LSB is equal to the 256 positions of the voltage applied to the terminal AB to divide by the potentiometer. Define the general equation of any valid input voltage on terminal A and terminal B when the output voltage when VW is VW is:

In order to perform more accurate calculations ( Including the impact of the resistance of the water scratcher), VW can be shown below:

The operation of the pressure device in the digital mode is more accurate. Different from the resistor mode, the output voltage mainly depends on the ratio of the internal resistance RWA and RWB, not the AB solution value. As a result, temperature drift is reduced to 15 PPM/° C.

ESD protection

All digital input SDA, SCL, AD0, and AD1 are protected with series input resistance and parallel Qina ESD structure, as shown in Figure 34 and Figure 35.

Terminal voltage operating range

AD5170 VDD to GND power supply defines the boundary condition of the normal operation of the 3 -terminal digital potentiometer. The power signal that appears on the terminal A, terminal B, and terminal W will be restrained by the internal positive bias diode (see Figure 36).

Power -powered order

Because ESD protects the two -pole pipes limited the voltage compliance of terminal A, terminal B, and terminal W (see Figure 36) Before the terminal A, terminal B and terminal W are applied to any voltage, it must be powered by VDD/GND. Otherwise, the diode will be pressed forward, so VDD will inadvertently call itAnd may affect the rest of the user circuit. The ideal sequence of power is GND, VDD, digital input, and then VA/VB/VW. As long as VDD/GND is powered on, the relative order of VA, VB, VW and digital input is not important.

Power supply considers items

In order to reduce the number of packaging pins, disposable programming and normal working voltage power sharing the same VDD terminal of AD5170. The AD5170 uses a fuse connection technology, which requires 5.25 V to 5.5 V to melt the internal fuse to achieve a given settings. However, after the fuse programming process, normal VDD can be between 2.7 V and 5.5 V. Therefore, if the system VDD is lower than the required VDD U OTP, dual voltage power supply and isolation are required. The rated voltage of the fuse programming power supply (vehicle regulator or rack power supply) must be 5.25 V to 5.5 V, and it can provide a 100 mA current, which continues 400 ms in order to successfully program. After the fuse programming is completed, the VDD U OTP power must be removed to allow normal operation at a voltage of 2.7 V to 5.5 V, and the device will consume the current range of μA. Figure 37 shows the easiest way to use the dual power requirements to use the jump line. This method saves a voltage supply, but it requires additional current and manually configuration.

In the 3.5V to 5.25V system, another method is to add a signal diode between the system power supply and OTP power supply, as shown in Figure 38 Show.

For users in the operating system under 2.7V voltage, it is recommended to use a two-way low threshold P-CH MOSFET to isolate the power. As shown in Figure 39, this assumes that the 2.7 V system voltage is applied first, the P1 and P2 gates are pulled to the ground, which opens the P1 and then opens the P2. Therefore, the VDD of AD5170 is close to 2.7 V. When the AD5170 settings are found, the factory tester applies VDD_OTP to VDD and MOSFETS gates and close P1 and P2. At this time, the program is protected at AD7.5 and the AD7.5 program is protected. Once the fuse programming is completed, the tester will exit VDD U OTP, and the settings of the AD5170 will be permanently fixed.

AD5170 implements the OTP function by fuse internal fuse. Users should always apply 5.25 V to 5.5 V one -time programming voltage requirements when trying fuse programming for the first time. Do not comply with this requirement may cause the fuse structure to change, resulting in the unprovable programming.

Poor PCB layout introduces parasites, which may affect fuse programming. Therefore, it is recommended to connect 10 μF 钽 capacitors in parallel as close as possible as possible as possible.And 1 NF ceramic capacitor. The type and value of the two capacitors are important. The combination of this capacitor value provides a fast response and larger power current processing, and at the same time, the power supply voltage is minimized during the transient process. Therefore, these capacitors improve OTP programming success rate by not inhibiting the appropriate energy required by internal fuses. In addition, C1 minimizes transient interference and low -frequency lines, while C2 reduces high frequency noise during normal operation.

Precautions for layout

It is best to adopt a compact and minimum layout design. The wires of the input terminal should be as direct as possible, and the length of the wire should be minimized. The grounding path should have low resistance and low inductance.

Please note that digital grounding should also be remotely connected to analog ground at a point to minimize ground rebound.

Evaluation software/hardware

There are two methods to control AD5170. Users can use computer software or external I2C controller to program the device.

Software programming

Due to the advantages of one -time programming characteristics, users can consider programming the device before the delivery of the final product. ADI provides equipment programming software, which can be implemented on the PC of Windows #174; 95 or higher when leaving the factory. Therefore, no external controller is required, which greatly shortens the development time. Program is an executable file that does not require any programming language knowledge or programming skills. It is easy to set and use. Figure 41 shows the software interface.

Before OTP programming, the medium scale of AD5170 was started after power -on. To increase or reduce the resistance, the user only needs to move the rolling bar on the left. To write any specific value, the user should use the bit mode in the screen above and press the Run button. The format of writing data to the device is shown in Table 7. Once the user finds a permanent link program and press the required fuse button.

To read the verification bit and data from the device, the user only needs to press the ""Read"" button. The format of the reading position is shown in Table 8.

To apply the equipment programming software in the factory, the user must modify the parallel portal cable, and configure the scooter of the pin to control the signal 2, insert the scooter 3, the pin 15, and the pin 25 to use it for SDA_WRITE, SCL, SDA_READ and DGND (Figure 42). Users should also use SCL and SDA pads to arrange the PCB of AD5170, as shown in Figure 43, so that POGO pins can be inserted into factory programming.

I2C interface

s u003d starting conditions.

p u003d Stop conditions.

A u003d Confirmation.

AD0, AD1 u003d packaging pins programmable address position.

x u003d I don't care.

W u003d Writing.

r u003d Read.

2T u003d the second melting array for two programming. Logic 0 corresponds to the first fine -tuning. Logic 1 corresponds to the second fine -tuning.

Please note that blowing and fine -tuning 2 before fine -tuning 1 will effectively disable fine -tuning 1, and in turn only allows disposable programming.

SD u003d Turn off the wiper to the B terminal and disconnect A. It does not change the contents of the wiper register.

t u003d OTP programming bit. Logic 1 Permanent programming wiper.

OW u003d cover the fuse settings and program the digital potential meter to different settings. Please note that after the power is powered, the digital potential meter is preset according to whether the fuse connection is melted and the fuse settings are preset.

D7, D6, D5, D4, D3, D2, D1, D0 u003d data bit.

E1, E0 u003d OTP verification bit.

0, 0 u003d Prepare for programming.

1, 0 u003d fatal error. Some fuses have no melting. Don't try it out. Discard this unit.

1, 1 u003d successful programming. Unable to adjust further.

I2C compatible 2 line serial bus

2 line I2C serial bus protocol work principle as follows:

1 The host starts the data transmission by creating a start -up condition, that is, when the SCL is high, the SDA line occurs from high to low (see Figure 45). The following bytes are from the address byte. It includes the slave address of the R/W bit (the determination of the data is read and write from the device). AD0 and AD1 are configurable addresses, allowing a maximum of four devices on one bus (see Table 7).

During the ninth clock pulse period, the slave address corresponding to the sending address is lowered to lower the SDA cable (this is called the confirmation bit). At this stage, all other devices on the bus remain idle, and the selected device waits for data to write or read from its serial register. If R/W is high, the main device will read data from the device. If the R/W bit is low, the main device will be written into the device.

2. In the writing mode, the second byte is the instruction byte. The first (MSB) 2T of the instruction byte is the second fine -tuning opening position. The second logical array selects a high -logo array, and the second logical array is low -logic. This means that after using Trim#1 fuse, the user has the opportunity to use Trim#2 fuse again. Please note that using Trim#2 before TRIM 1 will effectively disable TRIM#1, in turn, only allows disposable programming.

The second MSB SD is a closed position. High logic leads to wiper and terminal B short -circuit time terminal A. This operation produces almost 0 in the potential mode in the potential mode. It should be noted that the content of the closing operation will not interfere with the contents of the register. When it is out of the shutdown, the previous settings are applied to RDAC. In addition, during the shutdown, new settings can be programmed. When the part is returned from the shutdown state, the corresponding VR settings will be applied to RDAC.

The third MSB, T, is an OTP (one -time programming) programming bit. A logical high -voltage fuse is fused and permanently programmed for the resistor settings. For example, if the user wants to blow up the first set of fuses, the instruction byte will be 00100XXX. To detonate the second fuse, the instruction byte will be 10100xxx. The logic of the T position only allows the device to act as a typical easily lost digital potentiometer.

The fourth MSB must always be located at the logic 0.

Fifth MSB, OW, is a coverage. When rising to a logic high, OW allows the RDAC settings after the internal fuse is melted. However, once OW returns to logic zero, the position of RDAC will return to the previous settings. Because OW is not static, if the device is powered off or turned on, the RDAC will be preset according to whether the fuse is permanently set, and it presets it as the setting of the intermediate scale or the fuse melting.

The remaining position in the instruction byte is indifferent (see Figure 45).

After confirming the instruction byte, the last byte in the writing mode is data byte. The data is transmitted in the order of 9 clock pulses on the serial bus (after 8 data bits are connected to the confirmation bit). The conversion on the SDA line must occur at the low cycle of SCL and keep stable at the high cycle of SCL (see Figure 44).

3. In the reading mode, the data byte follows the confirmation of the belonging address byte. The data is transmitted in the order of 9 clock pulses (slightly different from the writing mode, and 8 data bits are followed by a confirmation bit). Similarly, the conversion of the SDA line must occur at the low cycle of SCL and maintain stability at the high cycle of SCL (see Figure 46).

After data bytes, the verification bytes contain two verification bits: E0 and E1. These positions represent the state of one -time programming (see Figure 46).

4. After all the data bit is read or writes, the host will establish a stop condition. The stop condition is defined as a conversion from low to high on the SDA line when SCL is high. In the writing mode, the host pulls the SDA cable to high during the 10th clock pulse to establish a stop condition (see Figure 45). In the reading mode, the host emits ""unspoken answers"" to the ninth clock pulse (that is, the SDA cable is kept high). ButLater, the host lowered the SDA cable before the 10th clock pulse, and the pulse became high to establish a stop condition (see Figure 46).

Repeatable writing function allows users to flexibly update RDAC output multiple times after the addressing and instruction components. For example, after RDAC confirms its subordinate address and instruction bytes in the writing mode, the RDAC output will be updated on each continuous byte. If you need different instructions, the writing/read mode must be restarted with new passage, instructions and data bytes. Similarly, RDAC's repeated reading function is allowed.

There are multiple devices on a bus

FIG. 47 shows four AD5170 on the same serial bus. Each has different slave addresses, because their AD0 and AD1 pins are different. This allows each device on the bus to be written or read independently. The main device output bus driver is a leak -down driver that is completely compatible with the I2C interface.

The size of the shape

1. ; However, the board is compatible with all available resistance options.