Features

Quick conversion rate: #9251; 22V/Typical

Settlement time (0.01%): #9251; 1.2ms maximum value

offset offset offset Voltage: #9251; 300MV maximum value

High -open ring gain: #9251; 1000 v/mv min

Low total harmonic distortion: #9251; 0.002%typical value

Increases of AD712, LT1057, OP215, TL072, and MC34082

Application

The output amplifier used for fast D/AS

Signal

Instrument amplifier

Quick sampling/Keep

Active filter

Low -incorrect audio amplifier

input buffer of A/D converter input buffer

Servo controller

General description

OP249 is a high -speed, precise dual JFET computing amplifier, similar to the popular single -transportation amplifier OP42. OP249 is better than the existing dual amplifier by providing excellent speed and excellent DC performance. The ultra -high -opening gain (minimum kV/MV), low -imbalance voltage and excellent gain linearity make OP249 the first truly high -precision dual high -speed amplifier in the industry.

The conversion rate of OP249 is 22V/μs, and the rapid stability time is as small as 1.2 μs to 0.01%, which is an ideal choice for high -speed bipolar D/A and A/D converters. OP249's excellent DC performance enables the complete accuracy of high -resolution CMOS D/A.

OP200Ω or 24Ω active filter suitable for high distortion rates, suitable for the active amplifier of high distortion rate, 24Ω active filter, etc.

OP249 provides significant performance upgrades for TL072, AD712, OP215, MC34082 and LT1057.

pin connection

Dice features

OP249 -typical performance characteristics [ 123]

Application information OP249 represents a reliable JFET amplifier design with a perfect combination of DC accuracy and high -speed. Solid outputThe ability to drive 600 and still maintain a clean communication response. OP249 has a more linear and more symmetrical signal response than the previous JFET input amplifier that can be used to compare OP249's large signal response (as shown in Figure 41) with the dual JFET amplifiers of other industry standards. Generally, the stewing performance of the JFET amplifier is simply specified as volt/μs. There is no discussion of the quality of stewing response, that is, lineivity, symmetry, etc.

OP249 is carefully designed, and even when the drive large output load is driven, it can provide symmetrical matching characteristics in the positive and negative direction.

The turning limit of the amplifier determines that the maximum frequency of sinusoidal output can be obtained without obvious distortion. However, it is important to note that the asymmetric stew of the previously available JFET amplifier adds a series of higher harmonic energy content response and additional DC output components. Examples of potential problems of asymmetric rotation behavior can be an audio amplifier application, where the natural low -pronounced sound quality is needed. In the servo or signal processing system, the net DC offset cannot be tolerated. The linear and symmetrical stewing characteristics of OP249 make it an ideal choice that exceeds the application of the full -power bandwidth range of the amplifier.

Like most JFET input amplifiers, if any input exceeds the specified input voltage range, the output of OP249 may occur in phase reversal. The phase reversal does not damage the amplifier, nor does it cause internal atresia.

The power supply is used to overcome the inductance and resistance related to the amplifier power cord. 0.1 μF and 10 μF capacitors should be placed between the feet and ground of each power supply.

The linearity of the opening of the ring

OP249 has a very high open -loop gain (minimum 1 kV/MV) and the constant gain linear. This feature of OP249 has improved its DC accuracy and provides excellent accuracy in the high -closed cycle gain application. FIG. 43 illustrates the typical opening gain linearity, even when driving 600 load can ensure high gain accuracy.

The offset voltage adjustment

OP249 inherent low offset voltage will make offset adjustments unnecessary in most applications. However, in the case of low offset errors, simple external circuits can be used for balance, as shown in Figures 44 and 45.

In FIG. 44, the offset adjustment is achieved by providing a small voltage at the non -turning input terminal of the amplifier. The voltage of the resistor R1 and R2 attenuated potentiometer provides a adjustment range of ± 2.5 mv (vs u003d ± 15 v), and refers to the input. Figure 45 shows no reversalThe offset adjustment of the bulk configuration also provides a adjustment range of ± 2.5 MV. As shown in the equation in Figure 45, if R4 is not far greater than R2, a closed -loop gain error will occur, and it must be considered.

Settling time Stable time is the time from the beginning signal to the time between the error zone that changes from the input signal to the output. The output error band is 5mV and 0.5mV, respectively, and the accuracy is 0.1%and 0.01%, respectively.

FIG. 46 shows the typical settlement time of OP249 870ns. In addition, the problem of settlement response, such as hot tails and long -term bells does not exist.

DAC output amplifier

The unit gain stability of the unit, the low bias voltage of 300 μV, the rapid stability time of 870 ns to 0.01%makes OP249 a fast number of fast numbers The ideal amplifier of the mold converter.

For CMOS DAC applications, the low offset voltage of OP249 leads to good linear performance. CMOS DAC, such as PM-7545, usually has 11 k and 33 k code-related output resistance changes. The change of the output resistance and 11 k the feedback resistor will cause changes in noise gain. This will cause changes in offset errors and increase linear errors. The characteristic of OP249 is a low offset voltage error, minimizing this impact, and maintaining 12 linear performance within the full volume range of the converter.

As the output capacitor of the DAC appears at the input terminal of the operation amplifier, the amplifier must be fully compensated. Compensation will increase phase margin and ensure the best overall settlement response. Use the capacitor C in Figure 47 to implement the required lead compensation.

Figure 48 illustrates the impact of changing compensation on the output response of circuit output in Figure 48A. Compensation is required to solve the combination of DAC output capacitors, input capacitors of computing amplifiers, and any bandate capacitance. It may be necessary to fine -tune the compensation capacitor to optimize the settlement response of any given application.

The stable time of the current output DAC and the computing amplifier combination can be approximately similar:

The actual total stability time is subject to the noise gain of the bulk, the compensation applied by the applied large, the compensation applied And the impact of the equivalent input capacitor of the amplifier input.

Discussion of the driver A/D converter

The stability characteristics of the operation amplifier also include the ability of the amplifier to recover (ie, stable) from the transient current output load conditions. An example of this aspect includes an input of an op amp driver from the SAR type A/D converter. Although the comparison of the converter is usually clamped by the diode, a diode pressure in the input end is positive and negativeThe drop will still cause significant modulation of input current. If the closed -loop output impedance is low enough and the bandwidth of the amplifier is large enough, the output will stabilize before the converter makes a comparative decision to prevent linear errors or loss of code.

FIG. 49 shows a stable measurement circuit for assessing the output current transient recovery. The output interference current generates the transient change of the 1MA output load current. As shown in Figure 50, for the 1MA load transient, OP249 has a very fast recovery of 274ns (to 0.01%). Its performance makes it an ideal amplifier for the data collection system.

The high -speed and excellent DC performance of OP249 make it an ideal amplifier for the 12 -bit data collection system. Check the circuit in Figure 51. A amplifier in OP249 provides a stable -5 V reference voltage for the VREF input of ADC912. Another amplifier in OP249 has a high -speed buffer of A/D input.

Check the transient voltage error at the worst case of the A/D converter simulation input node (Figure 52): OP249 recovers within a time of less than 100 nan seconds. Quick recovery is due to the broadband and low -DC output impedance of OP249.

OP249 spice macro model

Figure 53 and Tables 1 shows the node and network list of the spice macro model of OP249. This model is a simplified version of the actual device and simulates important DC parameters, such as VOS, iOS, IB, AVO, CMR, VO, and ISY. This model also simulates the changes in switching frequency, gain and phase response, and the frequency of common mode resonance ratio. This model uses typical parameters of OP249. The poles and zero points in the model are determined by the actual opening and closed -loop gain and phase response of OP249. In this way, the model provides precise exchanges for actual equipment. The model assumes that the ambient temperature is 25 ° C.

The size of the shape

The size unit is inch and (mm).

[1], TJ u003d+85 ° C.

[2], guaranteed by CMR test.