Application IF Amplifier VHF/UHF Transmission Wireless Infrastructure Cable/Satellite/MOCA
Product feature functional block diagram
50 ohm Cascadable Gain Blocks
50– 1000 MHz
19.5dB gain at 200MHz
+20.5 dBm p1db at 200 MHz
+43.5 dBm output IP3, 200 MHz
+60 dBm output IP2 at 200 MHz
Single +5 V supply, 95 mA current
1000 V electrostatic discharge, class 1C
SOT-89 Packaging

The WJA1500 is a cascaded gain block that provides high linearity in a low cost surface mount package
At 200MHz, the WJA1500 typically provides 19.5dB gain, +43.5dB OIP3 and +20.5dB P1DB. The device is housed in a RoHS compliant SOT-89 industry standard SMT package with annealed matt tin or Nippau plating to reduce or eliminate the possibility of tin whiskers.
The WJA1500 consists of Darlington pair amplifiers using high reliability INGAP/GAAS HBT process technology. The MMIC amplifier is internally matched to 50Ω and requires only DC blocking capacitors and bias inductors to work. Internal active bias is designed to achieve stable performance over temperature. A falling bias resistor is not required, allowing the device to be biased directly from the +5 V supply voltage.
WJA1500" 1000 Pieces on Reel (Standard) WJA1500 - PCB
The amplifier is targeted for high-performance mid-frequency applications in existing and next-generation wireless technologies. The WJA1500 is ideal for general purpose applications in the 50 to 1000 MHz frequency range such as low buffering, mid-frequency amplification and pre-drivers

The pin number label describes the RF input, matched to 50 ohms. Requires external DC block.
RF output RF output/DC power supply, matching 50 ohms. Requires external DC block, RF choke.
GND
Ground and back paddles. Multiple through holes should be used to reduce inductance and thermal resistance; see PCB Mounting Patterns in the Mechanical Information section.
Evaluation Board Printed Circuit Board Information
PCB 1069136 Materials and Stackup

notes:
1. All dimensions are in millimeters. Angles are in degrees.
2. Terminal 1 identifiers and terminal numbers are in accordance with JESD 95-1 SPP-012.
3. Up to 4-digit tracking code notes assigned by subcontractors:
2. Use at least 1 oz copper for top and bottom metal.
3. Through holes are required under the rear bezel of this device to ensure proper RF/DC grounding and thermal conductivity.
4. Do not remove or minimize through-hole structures in the PCB. Thermal grounding and RF grounding are critical.
5. We recommend drilling with a 0.35mm (80/.0135”) diameter drill bit for a final plating diameter of 0.25 mm (0.10”).
6. Ensure good package back bezel solder connection for reliable operation and best electrical performance.

ESD Sensitivity Rating Oops! Electrostatic Discharge Sensitive Devices
Class 1C greater than or equal to 1000 V and less than 2000 V
mannequin
JEDEC Standard JS-001-2012
Class C3
Models of charging devices above 1000 V (CDM)
JEDEC Standard JESD22-C101F
Solderability is compatible with lead-free (260°C max reflow) and tin/lead (245°C max reflow) soldering processes.
Contact Plating: Annealed Matt Tin or Nippau
RoHS Compliance This part complies with EU 2002/95/EC RoHS Directive (Restriction of the Use of Certain Hazardous Substances in Electrical and Electronic Equipment).
This product also has the following properties:
8226 ; lead-free, halogen-free (chlorine, bromine)
graded credit rating
MSL Level: Level 3 or above Test: 260°C Convective Reflow Standard: JEDEC Standard IPC/JEDEC J-STD-020
• No antimony • No TBBP-A (C15H12 BR402 )
• No PFOS
• No SVHC