The ADC0808 , ADC0809 data acquisition component is a monolithic CMOS device with 8-bit analog-to-analog scaling voltage reference microprocessor compatible control logic. 8-bit conversion technology. The converter features a high 8-channel multiplexer and address logic impedance chopper-stabilized comparator, 256R asks any one of the 8 single-ended analog signals. The device requires no external zero point and major specification full adjustment. Easy connection to microprocessors provided by latches The ADC0809 provides high speed, high accuracy, minimized temperature dependence, excellent long-term accuracy and repeatability, and consumes minimal power. These features make the device ideal for applications ranging from process and machine control to consumer and automotive applications. For 16-channel multiplexer with common output.

feature

Easily connect all microprocessors.

Ratiometric or 5 VDC or digitizer, 8-channel multiplexer.

No zero or full scale adjustment is required The A/D converter uses successive approximation as the conversion technique and the converter has a high 8-channel multiplexer and address logic.

0V to VCC input range divider with analog switch tree and a

The outputs meet the TTL voltage level specification successive approximation registers. 8 channels

The ADC0808 is equivalent to the MM74C949 multiplexer and can directly access any one of the 8 single-ended analog signals.

Main Specifications:

ADC0809 is equivalent to MM74C949-1

Resolution: 8-bit decoded multiplexer address input and latched TTL

Total unadjustable error: ± 189 ; LSB and ±1 LSB TRI-STATE output.

Single supply: 5 VDC ADC0808, ADC0809 design has been implemented

Low power consumption: 15 mW optimized by combining the most desirable aspects

Connection Diagram

ADC0808-N Package Diagram

ADC0809-N

Package diagram

The heart of this single-chip data acquisition system is its 8-bit analog-to-digital converter. The converters are designed to provide fast, accurate and repeatable conversions over a wide range of temperatures. The converter is divided into 3 main parts: 256R ladder network, successive approximation registers and

Compare. The digital output of the converter is correct. The choice of the 256R ladder network approach (Figure 1 below) over the inherent monotonicity of traditional R/2R ladders ensures that no numerical codes are lost. Monotonicity is especially important in closed loop feedback control systems. A non-monotonic relationship could lead to oscillations, which would be a catastrophic system. In addition, the 256R network does not cause load changes of the reference voltage. The bottom and top resistors of the ladder network in Figure 1 below differ from this value to the rest of the network. The difference in these resistors results in an output characteristic that is symmetrical using the zero and full scale points of the transfer curve. The first output transition occurs when the analog signal has reached +½LSB, and subsequent output transitions occur every 1 LSB until full scale. The successive approximation register (SAR) performs 8 iterations to approximate the input voltage. For any SAR type converter, an n-bit converter requires n iterations. Figure 2 below shows a typical example converter for 3 bits. In ADC0808, ADC0809, the approximation technique is extended to 8-bit network using 256R. The successive approximation register (SAR) of the A/D converter resets the start pulse on the rising edge that initiates the conversion. Conversion begins on the falling edge of the start conversion pulse. A conversion in progress will be interrupted by receiving a new start conversion pulse. The end of conversion (EOC) output can be connected to the SC input by implementing continuous conversion. If used in this mode, the external start conversion pulse should be applied after power up. After rising, end-of-conversion will go low between 0 and 8 clock pulses at the edge that begins the conversion. The most important part of the A/D converter is the comparator. It is this part that is responsible for the final accuracy of the entire converter. It is also comparator drift that affects the repeatability of the device the most. Chopper-stabilized comparators provide the most efficient way to meet all converter requirements. A chopper-stabilized comparator converts the DC input signal to an AC signal. This signal is then fed to a high gain AC amplifier and restored to the DC level. This technique limits the drift component of the amplifier because drift is a DC component and it cannot pass through an AC amplifier. This makes the entire A/D converter very insensitive to temperature, long-term drift and input offset errors.

A good example of a ratio sensor is a potentiometer used as a position sensor. The position of the wiper is proportional to the output voltage, which is the ratio of the full-scale voltage across it. Since data is represented as a ratio of full scale, reference requirements are greatly reduced, eliminating a source of error and cost for many applications. A major advantage of the ADC0808 is that the ADC0809 is that the input voltage range is equal to the power supply range, so the sensors can be connected directly to the power supply and their outputs are connected directly to the multiplexer input. Proportional sensors, such as potentiometers, strain gauges, thermistor bridges, pressure sensors, etc., are suitable for measuring proportional relationships; however, many types of measurement absolute standards, such as voltage or current, must be referenced. This means that the system reference full-scale voltage to the standard voltage must be used relative to the system. For example, if VCC = VREF = 5.12V, then the full-scale range is divided into 256 standard steps. The smallest standard step size is 1 LSB, then 20 mV.

Resistor Ladder Limits The voltage from the resistor ladder is compared to the selected voltage 8 times in the transition. These voltages are coupled to the comparators through an analog switch tree, which is referenced to the power supply. Voltage must be controlled at the top, center and bottom of the ladder to maintain proper operation. The top of the ladder, Ref(+), should not be more positive than supply, and the bottom of the ladder, Ref(-), should not be more negative than ground. The center of the trapezoidal voltage must also be close to the center supply because the analog switch tree changes from N-channel switches to P-channel switches. These are automatically satisfied in the ratio system and can be easily satisfied in the ground reference system. The figure below shows a ground referenced system with separate power supplies and references. In this system, the supply must be trimmed to match the reference voltage. For example, if 5.12V is used, the power supply should be adjusted to within 0.1V of the same voltage.

The ADC0808 requires less than a milliamp of supply current, so developing a supply from a reference voltage is easy to accomplish. In Figure 1 below, the ground reference system is shown, from which the power reference is generated. The buffer shown can be an op amp driven enough to provide milliamps of supply current for the desired bus drive, or if the capacitive bus is driven by the output, a large capacitor will provide the transient supply current as shown in Figure 2 below. LM301 Overcompensated to ensure stable capacitance at 10µF output load. The top and bottom trapezoidal voltages cannot exceed VCC and ground, respectively, but they can be symmetrically below VCC and above ground. The center of the trapezoidal voltage should always be near the center supply. By using a, the sensitivity of the converter can be increased (ie, the size of the LSB step size is reduced) symmetric reference frame. In Figure 3 below, the 2.5V reference voltage is symmetrically centered around VCC/2 due to the same current flowing into the same resistor. The system has a 2.5V reference voltage, allowing half the LSB bit size of a 5V reference system.

Analog Comparator Input

The dynamic comparator input current is caused by periodic switching of on-chip stray capacitances. These are alternately connected to the output of the resistor ladder/switch tree network and the input of the comparator to chop to stabilize part of the comparator's operation. The average value of the comparator input current varies directly with clock frequency and VIN as shown. If no filter capacitors are used on the analog inputs and the signal source impedance is low, the comparator input current should not introduce converter errors because transients from capacitor discharge will die before the comparator output is gated. If input filter capacitors are required to reduce noise and signal conditioning, they tend to average out the dynamic comparator input current. It will then have the characteristics of the DC bias current whose effects can be conventionally predicted.