CY2291 is Clock/T...

  • 2022-09-23 12:36:28

CY2291 is Clock/Timing - Clock Generator, PLL, Frequency Synthesizer

The CY2291 is the third generation of the clock generator family. The CY2291 is upwardly compatible with the industry standard ICD2023 and ICD2028 by providing a continuation of its traditional high level of customizable features to suit different clock synchronization systems. All components provide the PC with a set of highly configurable shutdown functions for motherboard applications. Each of the four configurable clock outputs (CLKA-CLKD) can be assigned any combination of 1 of 30 frequencies. Multiple outputs configured to the same or related[3] frequencies have low (< 500 ps) skew, effectively providing on-chip buffering for heavily loaded signals.

The CY2291 can be configured for 5 V or 3.3 V operation. The internal ROM table uses EPROM technology, allowing complete customization of the output frequency. The reference oscillator has been designed for 10 MHz to 25 MHz crystals for additional flexibility without the need for external components to this crystal. Alternatively, the external reference clock can use a frequency between 1MHz and 30MHz. Customers using a 32 kHz oscillator must connect a 10MΩ resistor

Parallel to the 32 kHz crystal.

feature

Three integrated phase-locked loops

EPROM Programmability

Factory programmable (CY2291) or field programmable (CY2291F) device options

Low offset, low jitter, high precision output

Power management options (shutdown, OE, suspend)

Frequency selection options

Smooth slew of CPUCLK

Configurable for 3.3 V or 5 V operation

20-pin SOIC package

logical block diagram

Pinout Diagram

20-pin SOIC pinout

Function overview, output configuration:

The CY2291 has five independent frequency sources on-chip. These are the 32kHz oscillator, the reference oscillator and three phase locked loops (PLLs). Each PLL has a specific function. The system PLL (SPLL) drives the CLKF output and provides a fixed output frequency on the configurable output. SPLL provides the most output divider options. The CPU PLL (CPLL) is controlled by select inputs (S0-S2) to provide eight user-selectable frequencies and smooth slew between frequencies. Utility PLL (UPLL) provides the most accurate clock. It is usually used for miscellaneous frequencies provided by other frequency sources. All configurations are EPROM programmable, providing short-circuit samples and production lead times.

Power saving features:

When pulled, the SHUTDOWN/OE input tri-states the output LOW (the 32 kHz clock output is unaffected). If system shutdown is enabled, a low level on this pin also shuts down the PLL, counter, reference oscillator and all other active components. The current drawn on the VDD pin is less than 50A plus 15. The 15A maximum is typically 10A for a 32-kHz subsystem. After leaving shutdown mode, the PLL must relock. All outputs except 32K have weak pull-down outputs when three say don't float. The S2/SUSPEND input can be configured to turn off a customizable output and/or PLL bank when low. Almost any output of all PLLs except 32K can be combined off. The only limitation is that if the PLL is turned off, all outputs derived from it must also be turned off. Pausing the PLL shuts down all associated logic while simply pausing the output to force a tri-state condition [3]. The CPUCLK can transition (translate) smoothly between 8 MHz and 8 MHz to the maximum output frequency (100 MHz at 5V / 80 MHz at 3.3 V for commercial temperature parts). This feature is very useful for "green" PC and laptop applications, reducing the frequency of operation can save considerable power. This feature meets slew requirements for all 486 and Pentium® processors.

CyClocks is an easy-to-use application that allows you to configure any of the EPROM programmable clocks provided by Cypress. You can specify the input frequency, PLL and output frequency and different function options. Note that when specifying, the output frequency range in this datasheet is in CyClocks to ensure you stay within the limits. CyClocks also has a power calculation feature that allows you to see the power consumption of a specific configuration. CyClocks is a CyberClocks 8482 ; a sub-application within the software.

Toggle waveform graph

All outputs, duty cycle and rise/fall times

Output tri-state timing[21]

CLK output jitter and skew

CPU frequency change