The Engine Knock Signal Processor HIP9011 is used to provide a method for detecting early detonation commonly referred to in "cottage or flat" internal combustion engines. Simplified block diagram shown in IC. The chip can choose between one of two sensors, if required for accurate monitoring or for "V" motors. Internal control via the SPI bus is fast enough to switch the sensor every transmit cycle. Programmable bandpass filters process the input signal from either sensor. The bandpass filter can be selected to optimize the extraction of engine knock or flat signal background noise from the engine. The output voltage level obtained by obtaining further single processing of the filtered signal and applying it to the integrator is proportional to the amplitude of the knock signal. The chip is controlled under a microprocessor via the SPI bus interface.

Simplified block diagram:

Instructions

This integrated circuit is designed to be a universal digitally controlled interface between an analog engine acoustic sensor or accelerometer and an internal combustion engine fuel management system. Set up two wideband input amplifiers, which will use two sensors. These sensors are piezoelectric and can be installed in either inline or V-sweet engine configurations. The outputs from these input amplifiers are directed to a channel selection multiplexer and then into a 3rd order antialiasing filter. The output signal is then directed to two programmable gain stages, one of which inverts or shifts the knock signal 180 degrees. The signal from the gain stage is output to 2 programmable bandpass filter stages. From the two outputs the BPF stage is digitized before full-wave rectification is integrated by a programmable one. The integral output is applied to the line driver for further processing by the engine fuel management control system. Gain, pass filter and integrator stage settings are programmed by a microprocessor via an SPI bus interface for broadband piezoelectric transducers Engine signal pickups have in-sequence device capacitances of 1100pF and output voltages ranging from 5mV to 8VRMS . During normal engine operation, a single input channel is selected and applied to the HIP9011. Engine background noise is usually much lower in amplitude than pre-knock noise. Therefore, the bandpass filter stage can be optimized to further differentiate the engine's background, combustion noise and pre-detonation noise. A basic approach to the engine's pre-detonation system is to observe only the time interval during which the engine's background noise is expected and, if detected, to delay the time. This basic method does not require sensitivity and it is a solution that requires a continuously tunable selectivity. Improved fuel economy and performance are gained when the IC is coupled with a microprocessor controlled fuel management system.

Pin:

Two amplifiers can be selected to interface to engine sensors. These amplifiers have a typical open-loop gain of 100dB and a typical bandwidth of 2.6MHz. 0.5V either rail within the common analog input voltage range. The amplified filter output also has a similar output range. Sufficient gain, bandwidth, and output swing capability settings to ensure that the amplifier can handle 20 attenuation at a gain setting of 1 or -26dB. This will be a high peak output signal when needed, 8VRMS in the range obtained from the transducer. A gain setting of 10 times can also be required when the transducer has an output level of 5mV RMS. In a typical application, the input signal frequency may vary from 1kHz to 20kHz. External capacitors can be used to separate the IC from the sensor (C1 and C2) refer to capacitance Figure 4. Typical value is 3.3nF. Input resistors R1 and R2 in series are used to connect the input of the inverting amplifier (pins 19 and 16) and feedback resistors R3 and R4, combined with R3 and R4 are used to set the gain of the amplifier. A medium voltage level is generated inside the IC. This level is set midway between V DD and ground. This level across the IC is used as a quiet DC reference for signal processing circuits within the IC. This point is brought out for several reasons, it can be used as a reference voltage, and it must be bypassed to ensure that it still acts as a quiet reference for the internal circuits. The input amplifier is designed with a power-down capability, wherein when activated, its bias circuit is disabled and its output goes into a tri-state condition. This is used during diagnostic mode, where the output terminals of the amplifier are externally driven by various test signals in the world.

Input Amplifier Connections:

Anti-aliasing filter

The IC has a 3rd order Butterworth filter with a 3dB point at 70kHz. Dual polycapacitors and implanted resistors are used to set the pole filter. This filter needs to have more than 1dB of attenuation at 20kHz (highest off frequency) and 10dB minimum attenuation at 180kHz. This filter operates at a system frequency of 200kHz before it runs the switched capacitor filter stage.

Programmable Gain Stage

Gains for two identical programmable gain stages can be adjusted so that the knock energy can be compensated if needed. This adjustment can be made by making 64 different gain settings, ranging between 2 and 0.111. These signals can swing between 20 and 80% of VDD. Programming the SPI communication is discussed in the Protocol section.

Programmable Band Pass Filter

Two identical programmable filters are used to detect frequencies of interest. A Band Pass Filter (BPF) is programmed to pass the frequency components of the engine knock. The filter frequency is established by the characteristics of the specific motor and transducer. By integrating the integral stage from the two rectified filtered outputs, knocking can be detected if it has occurred. These filters have a nominal differential gain of 4. Their frequency is set by a programmable word (discussed in the Setup SPI Communication Protocol section). The center frequency can be programmed from 1.22kHz to 19.98kHz in 64 steps. The filter Q statement is usually 2.4.

The output of the bandpass filter of the active full wave rectifier is buffered before unity gain by full wave rectification using switched capacitor technology. Each side of the rectifier circuit provides the negative and knock frequency bandpass frequencies for the positive filter output. The output is capable of swinging from 20 to 80% DD of V. Care was taken to minimize changes from RMS input to the output of the stage.

The programmable integration stage separates the signal from the rectifier stage into 2 outputs and then integrates them together into the signal path. Differential systems are used to reduce noise. One side integrates the positive energy value from the cottage high frequency rectifier. This second side does the integral of the negative energy value. Positive and negative energy signals are opposite phase signals. Using this technique reduces the effect of noise from the system on the actual signal.

The integral time constant is software programmed by the integral time constant discussed in the Communication Protocol section. The time constant can be programmed from 40 μs to 600 μs, with a total of 32 steps. If, for example, we set a time constant of 200µs, then with a one-volt difference between each channel, the output integral will change by 200ps in volts. Integration is controlled by the rising edge enable signal INT/HOLD input. The integrator output will drop approximately VRESET, 0.125V 20µs after the internally integrated input reaches a logic high level. The output of the integrator is an analog voltage.

Differential to Single-Ended Converter This circuit takes the differential output of the integrator (by testing the multiplexer circuit) and provides a signal which is the sum of these two signals. This technique is used to improve the anti-jamming capability of the system.

Output Buffer The amplifier output is the same as the input amplifier of the amplifier circuit used to interface with the sensor. For when the output of the anti-aliasing filter is evaluated for diagnostic purposes, the amplifier is in power-down mode.

Test Multiplexer This circuit receives from the positive and negative outputs of the integrator, together with the outputs from the different sections of the IC. The output of the test multiplexer is connected by the network to control the programming word of the communication protocol. This multiplexes the switched capacitor filter output, its gain control output and the antialiasing filter output.

The SPI communication protocol communicates the knock sensor (MOSI) via the SPI bus. A chip select pin (CS) is used to enable the chip, which, in conjunction with the SPI clock (SCK), while moving an 8-bit programming word. Five different programming words are used to set the following internal programmable registers: gain, bandpass frequency filter, integrator time constant, channel selection, SO output mode, and test module. When Chip Select (CS) goes low, on the next falling edge of the SPI clock (SCK), the data is latched into the SPI register. These data are shifted the most significant point fi first and the most significant last point. Each word is divided into two parts: the network connection first the address, then the value. Depending on the function being controlled, the address is 2 or 3 bits and the value is 5 or 6 bits long. All network connections can be entered into the IC in the hold mode of operation if programmed. The integrated or hold mode of operation is controlled by the INT/HOLD input signal.