The HIP6013 provides complete control and protection of a DC-DC converter optimized for high performance microprocessor applications. It is designed to drive an N-channel MOSFET using standard buck topology. The HIP6013 integrates all control, output regulation, monitoring and protection functions into a single package. The converter's output voltage can be precisely regulated down to 1.27V , with a maximum tolerance of ±1.5% over temperature and line voltage variations. The HIP6013 provides simple, single feedback loop, voltage-mode control with fast transient response. It includes a 200kHz free-running triangle wave oscillator, adjustable from below 50kHz to as much as 1MHz. The error amplification filter features a 15MHz gain bandwidth product and 6V/µs slew rate enabling the converter's high bandwidth fast transient performance. The resulting PWM duty cycle ranges from 0% to 100%. The HIP6013 prevents overcurrent conditions and inhibits PWM operation. The HIP6013 monitors the current by using an RDS(ON) MOSFET on top that eliminates the need for a current sense resistor.

Function Description

The HIP6013 automatically initializes upon receiving power. No special sequencing of input power is necessary. The power-on reset (POR) function continuously monitors the voltage of the input supply and the enable (EN) pin. The power-on reset monitors the bias voltage under the VCC terminal with the input voltage (VIN) on the OCSET pin. The upper OCSET level is equal to a fixed voltage drop less than VIN. With a power-on reset function from VCC to VCC, the EN pin initiates soft-start operation after two input supply voltages exceed its POR threshold. For operation with a single +12V supply, VIN and VCC are equivalent, and the +12V supply must exceed the rising VCC threshold POR to begin operation. The Power-On Reset (POR) function inhibits the operation of disabling the chip (EN pin is low). With both input supplies above their POR thresholds, transitioning the EN pin high initiates the soft-start interval.

figure 1

soft start

A power-on reset function initiates a soft-start sequence. An internal 10µA current source charges an external capacitor (CSS) on the SS pin to 4V. The soft start clamps the error amplifier output (COMP pin) and reference input (+ terminal error amplifier), the voltage at the SS pin. Figure 1 shows the soft start interval for CSS = 0.1µF. The initial misclamping amplifier (COMP pin) controls the output voltage of the converter. At t1, as shown in Figure 1, the voltage of SS reaches the triangle wave of the valley oscillator. The oscillator's triangular waveform is compared to the sloped error amplifier voltage. This produces more and more wide phase pulses to charge the output capacitor(s). Increase the pulse width for this time interval until t2. With the sufficient output voltage, the reference input clamp controls the output voltage. This is the time interval between t2 and t3 in Figure 1. At t3 the voltage of SS exceeds the reference voltage and the output voltage is in regulation. This method provides a fast and controlled rise of the output voltage.

figure 2

overcurrent protection

The overcurrent protection function monitors the current from a short circuit of the converter output by using the on-resistance on the MOSFET, rDS(ON). This approach improves the converter's EF network efficiency and eliminates cost-reducing current-sense resistors. A soft-start function in hiccup mode during the period of the overcurrent function to provide fault protection. Resistor (ROCSET) program overcurrent trip level. An internal 200µA (typ) current sink develops the voltage across R OCSET that is referenced to VIN. When the voltage across the MOSFET exceeds the voltage OCSET across R, the overcurrent function initiates a soft-start sequence. The soft-start function discharges ?SS with a 10µA current sink and inhibits PWM operation. The soft-start function charges ?SS and the PWM work resumes to clamp the SS voltage with error amplification. If an overload SS occurs while charging, the soft-start function inhibits PWM operation, while the fully charged SS is 4V to complete the cycle. Figure 2 shows the overload state for this operation. Note that the inductor current increases during the charging time interval with the C15ASS and will cause an overcurrent trip. The power consumption of the converter is very low with this method. The measured input power is 2.5W for the case of Figure 2.

image 3

Layout Considerations

As with any high frequency switching converter, layout is very important. Switching current from one power supply device to another can generate voltage transients across the impedance of the interconnected connecting wires and circuit traces. These interconnect impedances should be minimized using wide, short printed circuit traces. Critical components should be placed together from the ground using possible planar structures or single-point grounding. Figure 3 shows the critical power element converter. To minimize voltage overshoot, interconnect wires represented by thick lines should be part of the ground or power planes in the printed circuit board. The components shown in Figure 4 should be as close together as possible. Note that capacitors CIN and CO each represent several physical capacitors. Position the HIP6013 in the 3-inch MOSFET, Q1. The gate and source of the MOSFET connected from the HIP6013 for this circuit trace must be sized to handle peak currents up to Figure 1A. Figure 4 shows that additional circuit trace layout considerations are required. Use the circuits shown in Single Point and Ground Plane Construction. Minimize leakage on the current path on the SS pin and find the capacitor Css close to the SS pin since the internal current source is only 10µA. Provides local decoupling between VCC and GND pins. Find the capacitor CBOOT as close as possible to the BOOT and PHASE pins.

Figure 4