The EL7564 is a fixed frequency, current mode controlled DC/DC converter with integrated N-channel power MOSFETs and a high precision reference. The device integrates all the active circuits needed to implement a cost-effective, user-programmable 4A synchronous step-down regulator suitable for DSP core power use. By combining a high-efficiency synchronous switch architecture with fused-lead packaging technology, high power can be achieved at discrete outputs (13W) without the use of an external heat sink.

Working Principle The EL7564 is composed of seven main modules: 1. PWM controller 2. NMOS power FET and driver circuit 3. Bandgap reference 4. Oscillator 5. Temperature sensor 6. Power good and power-on reset 7. Auxiliary power tracking The EL7564 PWM controller regulates the output voltage by using current mode control pulse width modulation. The three main elements in the PWM control are the feedback loop and the reference, a pulse width modulator whose duty cycle is controlled by the feedback error signal, and a filter to control the average value of the logic level modulator output. In a step-down (buck) converter, the feedback loop forces the average output of the modulator to equal the desired output voltage. Unlike pure voltage-mode control systems, current-mode control uses a dual feedback loop to provide output voltage and inductor current information to the controller. The voltage loop minimizes DC and transient errors in the output voltage by adjusting the PWM duty cycle in response to changing line or load conditions. Since the output voltages are equal time-averaged the output power of the modulator finds a relatively large LC time constant for supplying applications usually resulting in low bandwidth and poor transient response. By directly monitoring changes in the controller's reaction time through a series of resistors that sense the inductor current, the reaction time is not entirely limited by the output LC filter and can react more quickly to changing voltage and load conditions. This feedforward feature also simplifies the overall loop response due to the addition of a zero to the AC loop compensation. By choosing an appropriate current-to-voltage feedback ratio, the overall loop response will approximate a unipolar system. The resulting system offers several advantages over conventional voltage control systems, including simple loop compensation, pulse-by-pulse current limiting, quick response to line changes and good load step response. The heart of the controller is a direct summation of the inputs that compares its total voltage feedback, current feedback, slope compensation ramp and power tracking signals together. Slope compensation is used to prevent the system from occurring in current mode unstable topology operation at duty cycles greater than 50%, and is also used to define the open loop gain of the overall system. Slope compensation is internally fixed and optimized for inductor ripple current of 500mA . Power supply tracking does not aid steady-state operation of any input to the comparator. The current feedback is switched by the high-side switching of the current flowing in the sense inductor within the patented sensing scheme when it is in progress. Whether the high-side NMOS switch is turned on at the beginning of each oscillator cycle. The comparator input gate is closed for a minimum period of approximately 150ns (LEB) after the high side switch is turned on to allow the system to settle. Leading edge blanking (LEB) period prevents false detection of voltage at the comparator input due to switching noise. The secondary overcurrent comparator terminates the high-side switching time if the inductor current exceeds the maximum current limit (ILMAX). If I LMAX has not been reached, the output from the regulator gets the feedback voltage FB to the voltage VOUT then, relative to the internal feedback reference voltage. The resulting error voltage is summed with the current feedback and slope compensation ramps. The high-side switch remains on until all four comparator inputs sum to zero, at which point the high-side switch is turned off and the low-side switch is turned on. However, the maximum on-duty cycle of the high-side switch is limited to 95%. To eliminate cross-conduction of the high-side and low-side switches a 15ns break-before-make delay is incorporated in the switch driver circuit. The output enable (EN) input allows the regulator output to be deactivated by an external logic control signal.

thermal management

The EL7564CM utilizes a "melted lead" packaging technique used in conjunction with the system board layout to achieve lower thermal resistance than typically found in standard SO20 packages. By fusing (or connecting) multiple external leads to the chip substrate within the package, a highly conductive thermal path is created to the outside of the package. This thermal path must then be connected to the heat on the PCB in order to dissipate heat out of the sink area and away from the device. The EL7564CM packages for the conductive paths are fused leads: #6, 7, 11, 12, and 13. If a sufficient amount of the metal area of the printed circuit board is connected to the junction-to-ambient resistance of the fused package leads of 43°C/W, you can achieved (relative to a 85°C/W standard SO20 package). The general relationship between the thermal dissipation metal area and thermal resistance of a printed circuit board is shown in the performance curve segment of this data sheet. It can be easily seen that the thermal resistance of this package approaches asymptotic values of about 43°C/W without any airflow, and 33°C/W with 100 LFPM airflow. More information can be found in Application Note #8 (Measuring Thermal Resistance in Power Surface Mount Packages). For thermal shutdown the junction temperature dies at 135°C, and the power dissipation is 1.5W, and the ambient temperature can be as high as 70°C without airflow. 100 LFPM airflow, ambient temperature can be extended to 85°C.

The EL7564CRE is available in a 28-pin HTSSOP package. Most of this heat is dissipated at the bottom of the package through the exposed thermal pad. Therefore, the thermal pad needs to be soldered to the PCB. This thermistor package is as low as 29°C/W, better than SO20's. Typical performance is shown in the curve section. The actual junction temperature can be measured at the V TJ pin. Because the thermal performance of an IC is heavily dependent on board layout, system designers should exercise care during the design phase to ensure that the IC will operate under worst-case environmental conditions.

Layout Considerations

The layout is very important for the converter to function properly. Power ground and signal ground should be separated to ensure that high pulse current power ground will not interfere with sensitive signal connections to signal ground. They can only be connected at one point (usually the negative side of either input or the output capacitor). The trace connected to the FB pin is the most sensitive to trace. It must be as short as possible and in a "quiet" place, preferably surrounding it with a protective ground wire or SGND trace. Also, the bypass capacitor connected to the VDD pin needs to be as close to the pin as possible. The heat of the chip is mainly dissipated through the protective ground wire for the CM package, and through the bottom layer of the thermal pad for the CRE package. Maximized copper area around these PGND pins or thermal pads is best. In addition, EMI performance on hard surfaces is always helpful. This demo board layout is based on a good example of these principles. Please refer to the layout of the EL7564 application brief.