DRV8412 , DRV8432 are high-performance, integrated dual-channel full-bridge motor drivers and advanced protection systems. Because of the low R DS(ON) H-bridge MOSFETs designed with smart gate drives, the efficiency of these motor drivers can be as high as 97%, which enables the use of smaller power supplies and heat sinks and is a good candidate for energy efficient applications. The DRV8412, DRV8432 require two power supplies, one at 12 V for GVDD and VDD, and another for PVDD up to 50 V. The DRV8412, DRV8432 can operate up to 500 kHz switching frequency while still maintaining precise control and high efficiency. They also have an innovative protection system to maintain equipment against a wide range of failure conditions that could damage the system. These safeguards include short-circuit protection, over-current protection, under-voltage protection, and two-stage thermal protection. The DRV8412 and DRV8432 have a current limiting circuit that prevents device transients such as motor startup during load shutdown. Programmable overcurrent detectors provide adjustable current limit and protection levels to suit different motor requirements. The DRV8412 and DRV8432 have unique independent supply and ground pins for each half-bridge, which makes it possible to provide current measurement by external shunt resistors and support multiple motors with different supply voltage requirements.

power supply

In order to facilitate system design, DRV8412, DRV8432 need only 12 V power supply except H-bridge power supply (PVDD). An internal voltage regulator provides the appropriate voltage levels for the digital and low-voltage analog circuits. Additionally, the high-side gate driver requires a floating voltage source, which is accommodated by an external bootstrap capacitor through the built-in bootstrap circuit. Providing symmetrical electrical characteristics, the PWM signal paths, including the gate drive output stages, are designed as identical, independent half-bridges. For this reason, each half-bridge has independent gate drive supplies (GVDD_X), bootstrap pins (BST_X), and a power stage supply pin (PVDD_X). In addition, an extra pin (VDD) serves as a supply for all common circuits. Special care should be taken to place all decoupling capacitors as close as possible to their associated pins. In general, inductive power pins and decoupling capacitors must be avoided between power supplies. Additionally, decoupling capacitors require a short ground path back to the device. For a properly functioning bootstrap circuit, a small ceramic capacitor (an X5R or better) must be connected from each bootstrap pin (BST_X) to the output pin (OUT_X) of the connected power stage. When the output of the power stage is low, the bootstrap capacitor is charged through an internal diode connected between the gate drive supply pins (GVDD_X) and the boot pin. When the power stage output is high, the bootstrap capacitor potential is shifted above the output potential, providing a suitable supply voltage for the high-side gate driver. In an application with PWM switching frequency ranging from 10 kHz to 500 kHz, using a 100 nF ceramic capacitor (X5R or better), size 0603 or 0805, is recommended in a bootstrap power supply. These 100 nF capacitors ensure sufficient energy storage, even at the smallest PWM duty cycle, to keep the high-side power stage FET fully on for the remainder of the PWM cycle. In an application operating at switching frequencies greater than 10 kHz, the bootstrap capacitor may need to be increased in value.

Pay special attention to power stage power supplies; this includes component selection, PCB layout and routing. As noted, each half-bridge has a separate power stage supply pin (PVDD_X). For best electrical performance, EMI compliance, and system reliability, it is important that each PVDD_X pin be decoupled with a ceramic capacitor placed as close as possible (X5R or better) to each power supply pin. It is recommended to follow the PCB layout for this DRV8412, DRV8432 EVM board. The 12 V supply should be from a low noise, low output impedance voltage regulator. Likewise, the 50-V power stage supply is assumed to have low output impedance and low noise. The power supply is facilitated by the internal sequence not critical by the power-on reset circuit. Additionally, the DRV8412 and DRV8432 are fully protected to prevent false power stage turn-on due to parasitic gate charging. Therefore, the voltage supply ramp rate (dv/dt) is not critical within the specified voltage range.

boot

DRV8412, DRV8432 do not require electrical sequence. The output of the H-bridge remains in a high-impedance state until the gate drive supply voltages GVDD_X and VDD are both above the under-voltage protection (UVP), voltage thresholds. Although not specifically required, it is recommended to hold RESET_AB and RESET_CD low while the device is powered on. This enables the internal circuitry to charge the half-bridge output with an external bootstrap enabled by a weak pull-down capacitor.

power outage

The DRV8412, DRV8432 do not require a power-down sequence. The device is still fully operational as long as the gate drive supply (GVDD_X) voltage is at VDD above the UVP voltage threshold. Although not specifically required, it is a good practice to hold RESET_AB and RESET_CD low to power down to prevent any unknown state during this transition.

equipment protection system

The DRV8412 and DRV8432 contain advanced protection circuits carefully designed for ease of system integration and ease of use, as well as maintenance from permanent failure due to a wide range of device fault conditions such as short circuit, overcurrent, overheating and undervoltage. The DRV8412 and DRV8432 immediately respond to a fault by setting the half-bridge output to a high-impedance (high-impedance) state and asserting the FAULT pin low. In situations other than overcurrent or overheating, the device automatically reverts to the fault when the condition has been removed or the gate supply voltage has also increased. For the highest possible reliability, reset the device externally without recovering from an overcurrent shutdown (OCSD) or OTSD fault as fast as 1 second after shutdown.

Bootstrap capacitor low voltage protection

When the device operates at low switching frequencies (eg, less than 10 kHz, with a 100 nF bootstrap capacitor), the bootstrap capacitor voltage may not be able to maintain a suitable voltage level for the high-side gate driver. The bootstrap capacitor undervoltage protection circuit (BST_UVP) prevents latent failure of the high-side MOSFET. When the voltage on the bootstrap capacitor is less than the value required for safe operation, the DRV8412, DRV8432 will initiate a bootstrap capacitor charging sequence (turning off the high-side FET for a short time) until the bootstrap capacitor is properly charged for safe operation. This feature can also be activated when the PWM duty cycle is too high (eg below 20ns off time at 10kHz). Note that the bootstrap capacitor may not be able to be charged if no load or very light load is present at the output when BST_UVP operation, so it is recommended to turn on the low-side FET for at least 50 ns per PWM cycle to avoid BST_UVP operation if possible. For switching applications below 10 kHz that do not trigger the BST_UVP protection, a larger bootstrap capacitor can be used (eg, 1 μF for 800 Hz operation). When using a bootstrap cap larger than 220 nF, it is recommended to add a 5Ω 12V GVDD resistor between the GVDD_X pins to limit inrush current to the internal bootstrap circuit.

Over Current (OC) Protection

The DRV8412, DRV8432 have independent, fast response current detectors with programmable thresholds on all high-side and low-side (OC threshold) power stage FETs. There are two settings for OC protection via the mode select pin: cycle-by-cycle (CBC) current limit mode and OC lockout (OCL) shutdown mode. In CBC current limit mode, the detector output is monitored by two protection systems. The first protection system controls the power stage to prevent further increases in output current, that is, it performs a CBC current limiting function rather than shutting down the device prematurely. This feature can effectively limit inrush current during motor startup or transients without damaging the unit. Under short-to-power and short-to-ground conditions, the current limiting circuit may not be able to control the current to an appropriate level, and the secondary protection system triggers a latched shutdown, causing the associated half-bridge to be set to a high-impedance (Hi-Z) state . Current limit and overcurrent protection are independent for half bridges A, B, C and D, respectively.

Application Diagram Example Full-Bridge Mode Operation