The HIP6006 provides complete control and protection of a DC-DC converter optimized for high performance microprocessor applications. It is designed to drive two N-channel MOSFETs in a synchronous rectified buck topology. The HIP6006 integrates all control, output adjustment, monitoring and protection functions into a single package. The converter's output voltage can be precisely regulated down to 1.27V , with a maximum tolerance of ±1% over temperature and line voltage. The HIP6006 provides simple, single feedback loop, voltage-mode control with fast transient response. It includes a 200kHz free-running triangle wave oscillator, adjustable from below 50kHz to as much as 1MHz. The error amplification filter features a 15MHz gain-bandwidth product and 6V/µs slew rate enabling the converter's high bandwidth fast transient performance. The resulting PWM duty cycle ranges from 0% to 100%. The HIP6006 prevents overcurrent conditions and inhibits PWM operation. The HIP6006 monitors the current by using an RDS(ON) MOSFET on top that eliminates the need for a current sense resistor.

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Function description initialization

The HIP6006 automatically initializes upon receiving power. No special sequencing of input power is necessary. A power-on reset (POR) function continuously monitors the voltage of the input supply and the enable (EN) pin. The power-on reset monitors the bias voltage under the VCC terminal with the input voltage (VIN) on the OCSET pin. The upper OCSET level is equal to a fixed voltage drop less than VIN (see Overcurrent Protection). With pin CC held to V EN, the power-on reset function initiates soft-start operation after two input supply voltages exceed its POR threshold. To operate with a single +12V supply, VIN and VCC are equivalent, and the +12V supply must exceed the rising VCC threshold POR to begin operation. The Power-On Reset (POR) function inhibits the operation of disabling the chip (EN pin is low). With both input supplies above their POR thresholds, transitioning the EN pin high initiates the soft-start interval.

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soft start

A power-on reset function initiates a soft-start sequence. An internal 10µA current source charges an external capacitor (CSS) on the SS pin to 4V. The soft-start clamps the error amplifier output (COMP pin) and the reference input (+error amplifier terminal) to the SS pin voltage. Figure 3 shows the time interval CSS = 0.1µF with soft start. Initially the clamp (COMP pin) in the error amplifier controls the output voltage of the converter. At t1 in Figure 3, the SS voltage reaches the triangular valley of the oscillator. The oscillator's triangle wave is compared to the ramped error amplifier voltage. This produces pulses of increasing width that charge the output capacitor(s). The interval of increasing pulse width continues until t2. With full output voltage, the reference input clamp controls the output voltage. This is the interval between t2 and t3 in Figure 3. At t3 the SS voltage exceeds the reference voltage and the output voltage is in regulation. This method provides a fast and controlled rise of the output voltage.

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over current protection

The current protection function monitors the current from a short circuit of the converter output by using the on-resistance on the MOSFET, rDS(ON). This approach improves the converter's EF network efficiency and eliminates cost-reducing current-sense resistors. A soft-start function in hiccup mode during the period of the overcurrent function to provide fault protection. Resistor (ROCSET) program overcurrent trip level. An internal 200µA (typ) current sink develops the voltage across R OCSET that is referenced to VIN. When the voltage across the MOSFET (also referenced to VIN) exceeds the voltage OCSET across R, the overcurrent function initiates a soft-start sequence. The soft-start function discharges ?SS with a 10µA current sink and inhibits PWM operation. The soft-start function charges ?SS and the PWM work resumes to clamp the SS voltage with error amplification. If an overload SS occurs while charging, the soft-start function inhibits PWM operation, while the fully charged SS is 4V to complete the cycle. Figure 4 shows the overload state for this operation. Note that the inductor current increases during the charging time interval with the C 15ASS and will cause an overcurrent trip. The power consumption of the converter is very low with this method. The measured input power is 2.5W for the case of Figure 4. The overcurrent function will trip at the peak inductor current (Ipeak) as determined by:

Layout Considerations

As with any high frequency switching converter, layout is very important. Switching current from one power supply to another can generate voltage transients across interconnecting wires and circuit impedance traces. These interconnect impedances should be minimized by using extensive, short printed circuit traces. The critical components should be as close together as possible using ground construction or single point grounding. Figure 5 shows the critical power element converter. To minimize voltage overshoot, interconnect wires represented by thick lines should be part of the ground or power planes in the printed circuit board. The components shown in Figure 6 should be as close together as possible. Note that capacitors CIN and CO each represent several physical capacitors. Find the HIP6006 in the 3-inch MOSFET, Q1 and Q2. The gates of the MOSFETs that this circuit traces and the source connections from the HIP6006 must be sized to handle peak currents up to 1A. Figure 6 shows that additional circuit trace layout considerations are required. Use the circuits shown in Single Point and Ground Plane Construction. Minimize leakage on the current path on the SS pin and find the capacitor Css close to the SS pin since the internal current source is only 10µA. Provides local decoupling between VCC and GND pins. Find the capacitor CBOOT as close as possible to the BOOT and PHASE pins.

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