The AD8314 is a complete low-cost subsystem to measure and control RF signals in the frequency range 100MHz to 2.7GHz with a typical dynamic range of 45dB and is designed for use in a variety of cell phones and other cell phone wireless devices. It offers a wider dynamic range and greater accuracy than using discrete diode detectors. In particular, it has very good temperature stability over an operating temperature range of -40°C to +85°C. Its high sensitivity allows control at low power levels reducing the need for coupled power detectors. It is essentially a voltage responsive device with a typical signal range of 1.25 mV to 224 mV rms or -58 dBV to -13 dBV. This equates to -45 dBm to 0 dBm, back to 50Ω. For convenience, use a 5 pF capacitor to AC couple the signal internally, a 3kΩ load, and a 2 pF shunt resistor. This high-pass coupling, with a corner around 16 MHz, determines the minimum operating frequency. So the power supply can be DC grounded.

The AD8314 provides two voltage outputs. The first, V_UP, as the input signal, increases from near ground to approximately 1.2 V. The level increases from 1.25 mV to 224 mV. This output is expected for measurement mode. See the Applications section for information on this mode. Capacitors can be connected to generate waveforms at intervals that increase the input average value between the V_UP and FLTR pins when needed. The second output, V_DN, is the inversion of V_UP, but with twice the slope and a fixed amount of offset. This output starts

The voltage is about 2.25 V (supply voltage ≥ 3.3V) at the minimum input and drops to a value close to ground at the maximum input. This output is used for analog control loop applications. The set point voltage is applied to VSET, and then V_DN is used to control the VGA or power amplifier. Here again, an external filter capacitor can be added to extend the averaging time.

The AD8314 is available in 8-lead MSOP and 8-lead LFCSP packages and consumes 4.5 mA from a 2.7 V to 5.5 V supply. When powered down, the typical sleep current is 20µA.

feature

Complete RF detector/controller function Typical range: -58 dBV to -13 dBV -45 dBm to 0 dBm, re-50Ω Frequency response from 100 MHz to 2.7 GHz Temperature stable linear dB response accurate to 2.7 GHz

Fast response: 70 ns to 10 dB steps

Low power: 12 mW at 2.7 V down to 20 μA

application

Cellular handsets (TDMA, CDMA, GSM)

RSSI and TSSI for wireless end equipment

Transmitter Power Measurement and Control

AD8314 functional block diagram

Absolute Maximum Ratings

Supply voltage VPOS 5.5 V.

V_UP, V_DN, VSET, ENBL 0 V, VPOS

Input voltage 1.6 V rms

Equivalent power 17 dBm

Internal power consumption 200 mW

JA (MSOP) 200°C/W.

JA (LFCSP, paddle welding) 80°C/W.

JA (LFCSP, pad unsoldered) 200°C/W.

Maximum junction temperature 125°C

Operating temperature range -40°C to +85°C

Storage temperature range -65°C to +150°C

Lead temperature (soldering for 60 seconds)

8-pin MSOP 300 °C

8-lead LFCSP 240°C

Pressures at or above the pressure ratings listed under Absolute Maximum may cause permanent damage to the product. This is a

Pressure ratings; functional operation of these products or any other conditions above those indicated in operation are not implied to be part of this specification. Operation beyond long-term maximum operating conditions can affect product reliability.

PIN configuration diagram

RM-8 pin configuration

CP-8-23 Pin Configuration

Pin function description

Pin No. Mnemonic Description

1 RFIN RF input.

2 ENBL Connect pin to VS for normal operation. Ground the pin to disable the mode.

3 VSET setpoint input for operation in controller mode. To operate in detector mode, connect VSET to V_UP.

4 The FLTR connection of an external capacitor slows the output response. Connect FLTR and V_UP between capacitors.

5 COMM Device Common (Ground)

6 V_UP Logarithmic Output. The output voltage increases with the input amplitude.

7 V_DN Inversion of V_UP, subject to: V_DN = 2.25 V - 2×VUP.

8 VPOS Positive Supply Voltage (VS), 2.7 V to 5.5 V. EPAD Exposed Pad. Connect EPAD to ground through a low impedance path. CP-8-23 only

Theory of Operation

The AD8314 is a similar log amp (log amp) designed to the AD8313; Figure 28 below shows the main power AD8314 using a block diagram schematic. The AD8314 combines two key functions to measure the range of signal levels under medium width dynamics. First, it provides the amplified small signals needed to respond, with a small signal gain of 10 dB per amplifier/limiter unit string and a bandwidth of approximately 3.5 GHz. At the output stage of each amplifier is a full-wave rectifier, basically a square-law detector battery, that converts the RF signal voltage into a fluctuating current with an average value that increases with the signal level. One adds an additional passive detector stage before the first stage. Thus, there are five detectors, each 10 dB apart, spanning a dynamic range of about 50 dB. The overall accuracy is at the extremes of this total range and is seen as a deviation from the ideal logarithmic response, the legal compliance error, however, when using this part, it must be understood that log amplifiers do not fundamentally respond to power. That's why dBV is used (decibels above 1 V rms) instead of the usual dBm metric. While the dBV scaling is fixed, independent of the termination impedance, the corresponding power levels are not. For example, 224 mV rms is always -13 dBV (assuming another condition for a sine waveform; see the Applications section for log intercept waveforms for more information on the effect), which corresponds to a net impedance of 5Ω at the input , the power is 0 dBm. When this impedance becomes 200Ω, the same voltage clearly represents a four times smaller power level (P = V2

/R), which is -6 dBm. Note that dBV can be converted to dBm13 dB for the special case of a 50Ω system by simply adding (0 dBV is equivalent to +13 dBm). Therefore, an external termination is added before the AD8314 to determine the effective power scaling. This tends to require simple resistors of the form (52.3Ω gives a net 50Ω input), but a finer matching network can be used. This impedance determines the log intercept, which is the power at which the input and output will exceed the baseline (V_UP = zero) if the function is continuous for all input values. Because real log amps are never like this, the intercept refers to the value obtained by the smallest error

A straight line fits the actual graph of V_UP versus PIN (more generally, VIN). Again, keep in mind that the quoted values assume a sinusoidal (CW) signal. Where there is complex modulation, as in CDMA, the calibration of the power response needs to be adjusted accordingly. Use rms response where true power (waveformindependent) response is required

Consider a detector such as the AD8361.

Invert the output

The second provision is to include an inverting amplifier to the output for use in controller applications. The largest power amplifiers require a gain control bias that must be reduced from a when the power output is large forward values need to be reduced. This control voltage appears at pin V_DN not only has the opposite polarity to V_UP, but has the opposite polarity. An offset needs to be added to determine its most positive value when the power level (assuming a monitoring PA is monitored) at the output of the directional coupler very small. The starting value of V_DN is nominally 2.25 V, and it falls on a slope twice that of V_UP; in other words, -43 mV/dB. Figure 1 below shows how a determined reference voltage maximum output is achieved from an on-chip voltage reference and is essentially independent of supply voltage or temperature. However, the relationship between the full output V_UP and V_DN cannot be obtained as shown in Figure 2 below.

The figure below shows the connections for the basic measurement mode. A supply voltage of 2.7 V to 5.5 V is required. A low inductance decoupling surface mount ceramic capacitor of 0.1µF should be used to supply the VPOS pin. A series resistor of about 10Ω can be added; this resistor slightly reduces the supply voltage to the AD8314 (the maximum current into the VPOS pin is about 9 mA when V_DN outputs 5 mA). Its purpose should be to avoid using low (ie 2.7 V) in applications where the supply voltage is very high. Series inductors provide similar power supply filtering with minimal supply voltage drop.

The ENBL pin is connected to VPOS. The AD8314 can be disabled from the normal 4.5 mA down to about 20 µA by pulling this pin to ground when the chip current is . This logic threshold is about +VS/2 and the enable function is enabled for about 1.5µs. Note, however, that in general, further settlement times require low input levels.

The AD8314 contains an input coupling capacitor. This requires no external AC coupling. The broadband input in this example is matched between RFIN and ground by connecting a 52.3Ω resistor. This resistance combined with the internal input impedance of approximately 3kΩ gives an overall broadband input resistance of 50Ω. Several other coupling methods are possible, described in the Input Coupling Options section. By connecting VSET to the selected measurement mode V_UP, it establishes a feedback path and sets the logarithmic slope to its nominal value. The peak voltage range is measured from -58 dBV to -13 dBV at.9 GHz, and just below 2.5 GHz at high frequencies. Therefore, using a 50Ω termination corresponds to a power range of -45 dBm to 0 dBm. At a slope of 21.5 mV/dB, this equates to an output range of 967 mV. The figure below shows the transfer function for V_UP with a supply voltage of 3 V at an input frequency of 0.9 GHz.

Slope and Land Transfer Function Intercept The AD8314's transfer function has characteristic its slope and intercept. The logarithmic slope is defined as

The RSSI output voltage changes and the input changes by 1 dB. For the AD8314, the slope is nominally 21.5 mV/dB. Therefore, a 10 dB change at the input will cause the output to change by about 215 mV. Record the consistency plot, where the device maintains a constant slope as shown above. Dynamic range can be defined as the range error that remains within a certain range, typically ±1 dB or ±3 dB. exist

For example, in the graph above, the ±1 dB dynamic range is about 50 dB (from -13 dBV to -63 dBV).

Operating in Controller Mode Figure 1 below shows the basic connected controller mode of operation, Figure 2 below shows a block diagram of a typical controller mode application of feedback from V_UP to VSET disconnect and applying the desired setpoint voltage VSET from a control source (usually a DAC). VDN rail high (2.2 V on 3.3 V supply, 1.9 V on 2.7 V supply) sets the point voltage when the applied power is less than the corresponding value. When the input power slightly exceeds this value, VDN decreases rapidly towards ground through the power amplifier gain pin without looping. In closed loop, however, a reduction in VDN causes the power drop amplifier to reduce its output. This restores balance to the desired value determined by the setpoint for the actual power level sensed at the input of the AD8314. This assumes that the gain control sense of the variable gain element is positive, that is, an increase in the voltage of V_DN tends to increase the gain.