The AD8021 is a very high performance and high speed performance voltage feedback amplifier that can be used in 16-bit resolution systems. It is designed to operate with low voltage and low current noise (2.1 nV/√Hz typical, 2.1 pA/√Hz typical) between the lowest quiescent supply current (7 mA @ ±5 V) at today's high speeds, Low noise operational amplifier. The AD8021 operates over a wide supply voltage range of ±2.25 V to ±12 V and a single 5 V supply, making it ideal for high-speed, low-power instruments. An output disable pin allows further reduction of quiescent supply current to 1.3 mA.

feature

low noise

2.1 nV/√Hz Input Voltage Noise

2.1 pA/√Hz input current noise

custom compensation

Constant bandwidth from G=-1 to G=-10

high speed

200 MHz (G = -1)

190 MHz (G = -10)

low power

5 V supply typical 34 mW or 6.7 mA

Output disable function, 1.3 mA

low distortion

-93 dBc second harmonic, fC = 1 MHz

-108 dBc 3rd harmonic, fC = 1 MHz

DC accuracy

1 mV maximum input offset voltage

0.5μV/°C Input Offset Voltage Drift

Wide supply range, 5 V to 24 V

low price

Small Package

SOIC-8 and MSOP-8 available

application

ADC Preamps and Drivers

Instrumentation Preamplifier

Active filter

Portable Instrumentation

line receiver

precision instrument

Ultrasonic Signal Processing

high gain circuit

AD8021 connection diagram

The AD8021 allows the user to select the gain bandwidth that best suits the application. With a single capacitor, the user can use the compensation AD8021 to obtain a small compromise in the gain bandwidth required. The AD8021 performs well for a 1 V step, with the amplifier settling to 0.01% in 23 ns. It has a fast overload recovery of 50 ns.

The AD8021 is stable over temperature with low input offset voltage drift and input bias current drift, 0.5 μV/°C and 10 nA/°C, respectively. The AD8021 is also capable of driving 75Ω lines with ±3 V video signals. The AD8021 is technologically superior and the price is considerably lower than the static current of similar amplifiers. The AD8021 is a high-speed general-purpose amplifier suitable for various gain configurations and can use the entire signal processing chain and control loop. The AD8021 is available in standard 8-lead SOIC and MSOP packages over an industrial temperature range of -40°C to +85°C.

Small Signal Frequency Response Plot

The AD8021 inputs are diode protected. Current limiting resistors are not used to keep noise low. If the differential input exceeds ±0.8 V, then

Input current should be limited to ±10 mA. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of these or any equipment under conditions other than those indicated in the operation is not implied as part of this specification. Exposure to absolute long-term maximum rated conditions may affect device reliability. Maximum Power Dissipation The maximum power that the AD8021 can safely dissipate is limited by the rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, about 150°C. Temporarily exceeding this limit may result in changes in parametric performance due to changes in the stress imposed by the package on the mold. Extended periods of junction temperature above 175°C may result in device failure. Although the AD8021 has internal short-circuit protection, it is not sufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curve.

Maximum Power Dissipation vs. Temperature 1 Diagram

Pin Configuration Diagram

A typical voltage feedback op amp is frequency stable using a fixed internal capacitor CINTERNAL, using dominant pole compensation. For a first-order approximation, a voltage-feedback op amp has a fixed gain-bandwidth product. For example, if for a gain of G = +1, its -3 dB bandwidth is 200 MHz; for a gain of G = +10, its bandwidth is only about 20 MHz. The AD8021 is a voltage feedback op amp with a minimum CINTERNAL of about 1.5 pF. By adding an external compensation capacitor, CC, the user can circumvent the fixed gain bandwidth limitations of other voltage feedback op amps. Unlike typical op amps with fixed compensation.

The AD8021 allows users to:

Maximize amplifier bandwidth to achieve closed-loop gains between 1 and 10, avoiding the usual bandwidth penalty and slew rate.

Optimize the trade-off between bandwidth and stage margin for specific applications.

Match bandwidth in gain blocks with different noise gains, such as when designing a differential amplifier (as shown in the figure below)

Figure 58 above is the gain and phase diagram of the AD8021 simplified for teaching purposes. Arrow A in the figure above shows a bandwidth of approximately 200 MHz and a phase margin of approximately 60° when the desired closed loop gain is G = +1 and the value chosen for the external compensation capacitor is CC = 10 pF. If the gain is changed to G = +10 and CC is fixed at then (as expected for a typical op amp) 10 pF, the bandwidth is

Downgrading to about 20 MHz increases the phase margin to 90 (arrow B). However, by reducing CC to 0 pF, the bandwidth and phase margin return to approximately 200 MHz and 60° (arrow C), respectively. Also, the slew rate increases sharply because it is roughly different from the inverse of CC.

The graphs below provide recommended values for slew rate, bandwidth, and noise for various gains and compensation capacitors at corresponding gains. Please be aware of. The value of the compensation capacitor depends on the circuit noise gain, not the voltage gain. As shown in the figure below, the noise gain GN is the op amp gain block equal to its non-inverting voltage gain, regardless of whether it is actually used for inverting or non-inverting gain.

With the AD8021, various tradeoffs can be made to fine-tune its dynamic performance. Sometimes more bandwidth is needed for a particular benefit or conversion rate. Reducing the compensation capacitance increases bandwidth and peaking due to reduced phase margin. On the other hand, if more stability is required, increasing the compensation capacitor will decrease the bandwidth and increase the phase margin. As with all high-speed amplifiers, parasitic capacitance and inductance around the amplifier affect its dynamic response. Usually, the input capacitance (due to the op amp itself, as well as the PC board) has a significant effect. The feedback resistor, together with the input capacitance, can act to lose phase margin, thereby affecting the high frequency response. A capacitor (CF) in parallel with a feedback resistor can compensate for this phase loss. Also, any resistor in series with the source will create a pole of resistance with input capacitance (as well as damping high frequency resonance and capacitance caused by package and board inductance), it is also important to note that increasing the resistor value will increase the overall noise of the amplifier and reduce feedback therefore, the resistor value will increase the load of the output stage and increase the distortion. Use the disable function when pin 8 (DISABLE) is higher than pin 1 (LOGIC reference) by about 2V or more, the part is enabled. When pin 8 drops to about 1.5 V in Pin 1, that part is disabled. See Table 1 for complete disabling and

Enable voltage level. If the disable function is not used, pin 8 can be connected to VS or a logic high source and pin 1 can be connected to ground or logic low. Alternatively, if pins 1 and 8 are not connected, the part is enabled.

The AD8021 uses a second-generation Analog Devices-proprietary high-voltage ultra-fast complementary bipolar (XFCB) process to build NPN transistors with similar fT in the PNP and 3N regions. The transistor is dielectrically isolated from the substrate (and from each other), eliminating parasitic and latch-up issues caused by junction isolation. It also reduces nonlinear capacitance (source of distortion) and allows higher transistor fT, for a given quiescent current. Supply current is curtailed, which results in reduced part-to-part variation in bandwidth, conversion rate, distortion and settling time. The AD8021 input stage consists of an NPN differential pair where each transistor operates at a 0.8 mA collector current. This allows high transconductance of the input device; therefore, the AD8021 has a low input noise of 2.1 nV/√Hz @ 50 kHz. The input stage drives a folded cascode which consists of a pair of PNP transistors. Folded cascodes and current mirrors provide differential to single-ended signal current conversion. This current then drives the high current impedance node (pin 5) with the CC external capacitor connected. The output stage maintains this high impedance current gain of 5000 Ω so that the AD8021 can be held high for open loop gain even under heavy load. Two internal diode clamps at the input (pins 2 and 3) protect the input transistors from large voltages that would otherwise cause emitter-base breakdown, resulting in reduced offset voltage and input bias current.