FeaturesTechnical Specifications
640 x 480 VGA resolution Image size 640 x 480 (VGA) 1/4" format Lens compatible pixel size 5.6 microns x 5.6 microns Onboard 10-bit ADC array size 3.6 mm x 2.7 mm onboard voltage regulator Analog gain x1 to x16 Auto Dark Calibration Car Audio Amplifier Sensitivity (typ) 2.05 V/lux sec I2c interface Maximum frame rate 30 fps (with 24MHz clock) Supply voltage 5V (USB)

Low power pause mode or 5-wire snapping output 3v3 direct drive frame grabber Signal: QCK and FST power consumption active (30fps) < 30 mA suspension < 100 microamps Description operating temperature 0oC-40oC
The image sensor CMOS technology based on the 36-pin CLCC type STMicroelectronics package is Bayer tinting technology.
The sensor provides raw digital video output ordering details, which also contain embedded code to facilitate external synchronization. The part number describes the sensor with a range of STMicroelectronics companion processors for the VV6501C001 36-pin CLCC color sensor for applications such as USB webcams and digital still cameras.
The I2C interface allows an external processor to configure the device and control exposure and gain settings.
Low-power pin-driven suspend mode simplifies USB-based designs.
The on-board voltage regulator operates at 5V USB powered and generates 3v3 and 1v8 power for external processors.

Overview Sensor Overview
The VV6501 VGA image sensor generates raw digital video data at 30 frames per second. This one uses an internal 10-bit column ADC to digitize the image data. The resulting 10-bit output data includes embedded code for synchronization. Data is formatted as 5-bit nibbles. A separate data acknowledgement clock (QCK) and frame start (FST) signals are also provided.
The sensor is fully configured using the I2C interface.
The sensor also contains an audio low noise preamplifier for use with an external microphone.
The sensor is optimized for USB applications and includes a voltage regulator to drive external.
Generate 3v3 and 1v8 power through transistors. These supplies can be used externally.
processor. The device can be forced into a low power state using a dedicated suspend input pin.
Also maintain the device configuration. It can be reset using the power-on reset signal (PORB).
external device.
VV6501 block diagram

typical application
USB Webcam This sensor can be used with STMicroelectronics STV0676 coprocessor to make a low cost USB webcam.

In this application, the coprocessor provides the sensor clock and uses embedded control to control sequences synchronized with frame and row-level timing. It then displays the color and processes the sensor's raw image data before providing the final image data to the host.
Use the USB interface.
Voltage regulators on the sensor are used to control external bipolar transistors for sensor and coprocessor power from the 5V USB supply. This approach eliminates the need for more expensive external voltage regulation circuits.

The input USB power supply is 5 V. The 3v3 digital regulator generates the digital power supply for the sensor.
Component and coprocessor IOS. The 1V8 regulator generates core power for the coprocessor.

Functional Description The first three sections of this chapter describe the main modules in the device in detail:
Video Audio Power Management The last section describes device-level operating modes, including suspend.
Video Block Overview The analog core of a video block contains a VGA-sized array of pixels. Integration time and access to a row of pixels are controlled by a block of Y addresses. The pixel row being read is converted using 10 bits in the column ADC. Digitized data is read out and formatted in digital blocks. The 10-B data is transferred to the coprocessor as 2 5-Bs over a 5-wire digital bus.
The exposure or integration time of the pixel array is calculated by an external co-processor and communicated to the sensor using the I2c interface.
Overview of video blocks

Data synchronization can be achieved by using embedded code in the data stream.
Or use dedicated FST and QCK pins.

The imaging array physical pixel array is 656 x 496 pixels. The pixel size is 5.6 microns by 5.6 microns.
pixel array
2 Border Rows Visible Array (640 x 480 inches) µm x 5.6 µm Pixels ( 3.5840 mm x 2.6880 mm) 2 Border Rows Additional Border Columns and Rows are included to achieve a final 640 x 480 size array.
Microlenses Microlenses placed above the visible pixels increase the light-collecting capability and thus the sensitivity.
Sensor Data Overview Sensor data is output on a 5-wire bus. As well as pixel data, there is an embedded code at the beginning and at the end of each video line. These codes are always preceded by an escape sequence that is guaranteed not to appear in the video data itself.
video data value

Digital data bus The sensor data can be 8 or 10 bits per pixel, transmitted as follows. The digital data output mode uses the SIF output tri-state register. 23 bits [5] can be used to tri-state all 5 data lines, QCK and FST. The output pad drive strength data and the QCK output pad are tri-stated, 4 mA drive.
Data Qualification Clock (QCK)
A data qualification clock (QCK) is available and complements the embedded control sequence.
This clock runs continuously when enabled, including: Fast QCK: The falling edge of the clock constitutes a pixel value every 5 or 4-bit data block.
Slow QCK: The rising edge defines the first, third, fifth, etc. data block values that make up the pixel, while the falling edge defines the second, fourth, sixth, etc. data block. For example, in 4-wire mode, the rising edge of the clock defines the most significant part, while the falling edge defines the least significant bit of the clock.
QCK mode

Line Format Each line of data from a sensor begins with an escape sequence, followed by a line code, identifying the line type. The line code is followed by two bytes containing an encoded line number.
Each line ends with an end-of-line code, followed by the line average. The only exception is that this is the first line in a frame, where the end-of-line code is followed by a frame count.

The start frame start line of the frame line format contains the contents of the first 16 serial interface registers, not the contents of any registers. video data. This information immediately follows the line of code at the beginning of the line. It takes 32 pixel clock cycles for the code to output these 16 serial interface register values after each serial interface value. The time period of the video portion of the remaining pixel row is filled with 07H value. The first two pixel locations are also filled with 07H characters. If the serial interface register location is not used, the value of register 0 is output.
After the escape sequence and line of code at the end of the active video, output the frame count.

Active Video Line Format All video data is contained on the Active Video Line. Pixel data is displayed as bytes in consecutive active lines.
Black Line Format Black lines contain information from the sensor's black lines (maintaining zero exposure). This information can be used by some coprocessors.
Black Line Format Dark lines contain information from the sensor dark lines (metal shields light). This sensor uses information from these survey lines to calculate a dark average offset value that is then applied to the video data to ensure a known "black" level of the image data.
To reduce the frame rate, the frame length can be extended by adding blank data lines. These do not contain video or black line data. In the default VGA mode, there are no blank lines.
Frame Line Format End Frame The only purpose of the frame end line is to indicate the end of the frame, it does not contain video data.

Extending Line Length The user can extend the line length by writing to serial registers 82 and 83. After inserting the line length padding into the EAV sequence, ensure that the distance sequence between the SAV and EAV remains the same.
Frame format Each video frame consists of a series of data lines VGA frame format
The 0 frame line starts to extend the inter-frame period. Users can choose to increase the frame length by writing to extend the inter-frame period.
Serial registers 97 and 98. In this case, insert the appropriate number of extra blank lines between the end of frame (EOF) line and the start of frame (SOF) line. This means that the distance between SOF and EOF remains the same.

Dark Calibration Algorithm The black line monitoring logic accumulates some dark pixels, calculates the average, and then compares this average to the corresponding black level. There is a bit in serial register 45,
Determines whether the offset applied is a user programmable value from serial register 44 or a value calculated by the offset cancellation processor.
The dark offset removal algorithm accumulates data from the input to the leaked black line.
Calculate the integrator and the appropriate offset.
On exposure/gain changes, power up or exit from pause mode, the historical dark calibration leak integrator is reset to the input value as the previously stored value will be out of date.
User Controls Serial interface allows the user to have additional controls for: Accumulate dark pixels, calculate dark pixel average and report, but not for data stream Accumulate dark pixels, calculate dark pixel average, report and apply internal calculation offset to data stream Sensor Clock and Frame Rate Control The frame rate is determined by the input sensor clock and some additional registers below.
User control. Sensor Clock Sensors require a single-ended clock input. A 24 MHz clock is required to produce a VGA image at 30 frames per second. The result is a pixel rate of 12 MHz.
Slower frame rates To achieve slower frame rates, the user has many options: Increase the time between frames by adding blank lines (via the SIF register) Apply a slower external clock Divide using the sensor internal clock divider (via the SIF register) external clock.
The clock divider sensor contains a 4-bit register that the user uses to select the clock divider setting given the mapping between the clk_div value and the divider ratio.

Exposure/Gain Control The sensor does not contain any form of automatic exposure or gain control. To generate the exposure image correctly, the exposure and gain values must be externally calculated and written to the sensor.
via the serial interface.
Exposure to calculate the pixel exposure time and ADC range (and therefore gain) is available via the serial interface. The following explanation assumes that the gain and exposure values have been updated as part of the 5-byte serial interface auto-increment sequence.

Acquire Time and Exposure Update Exposure and gain values are retimed within the sensor to ensure that only a new set of values is applied to the sensor array at the beginning of each frame. When a new exposure value is written via the serial interface, but has not yet been applied to the sensor.
array.
The result of applying a new exposure value to the sensor array and reading the new exposure value. Gains do not have the same delay value. To ensure that the new exposure and gain values are properly aligned, the sensor delays application of the new gain value frame by frame relative to the application of the new exposure.
To eliminate the possibility that the sensor array will only see part of the new exposure and gain settings, if the serial interface communication is extended to frame boundaries, the internal retiming will be disabled when writing data anywhere in the "Exposure" page" Exposure" and "Gain" data. Serial Interface Register Map. Therefore, if the 5 bytes of exposure and gain data are sent in auto-incrementing order, it is unlikely that the sensor will consume only part of the new exposure and gain data.

Audio Amplifier Main Function The PSRR micro-bias reference is very high due to the bandgap of the 3.3V regulated supply.
As an RC network for low frequency filtering in the audio bandwidth.
Fully differential LNA with serial IF gain control (0dB to +42dB in 6dB steps).
Typical application of VV6501 audio amplifier with dynamic range up to 1.8vpp on AudOutp and AudOutn

The power management block on the power management regulator device avoids any external system requirements. Regulators in 5V camera products.
Digital Regulator 1 - This 5 V to 3.3 V regulator uses an external bipolar transistor to supply loads up to 200 mA. It is typically used to power the sensor digital logic, but can also be used to provide an external co-processor if required. This regulator is always on.
Digital Regulator 2 - This 3.3 V to 1.8 V regulator uses an external bipolar transistor to supply loads up to 100 mA. This power can be used for an external coprocessor if required. This regulator is controlled by the PDREG1V8 pin and must be turned off if not needed.
Audio Amplifier Regulator - This 5 V to 3.3 V regulator powers audio amplifiers and buffers.
Amplifier (5 mA load) used to provide reference to microphone. Should be externally decoupled with a 2.2µF capacitor. For applications without audio, this regulator may be powered down through the SIF register.
Video Regulator - This 5 V to 3.3 V regulator powers analog video circuits. Should be externally decoupled with a 2.2µF capacitor.
Voltage Regulator Block Diagram

Power-on Reset Unit The power-on reset unit generates a low-pass pulse when the digital power supply drops below.
their lower limit. The power-on reset signal resets the sensor internally and can also be used to reset the coprocessor.
Porb units monitor 3v3 and 1v8 power supplies. If the 1V8 supply is not required, PDVREG1V8 must be tied high.

Suspend Mode Suspend Mode is the lowest possible power consumption mode when the current is less than 100µA.
The external clock inside the mode device is strobed and the analog block is powered down.
The sensor is put into suspension mode by actuating the suspension pin. To minimize power consumption, the duration of the clock source suspend mode should also be turned off.
Sensor Soft Reset All serial interface registers can be reset to their default values by setting the "soft reset" bit (bit).
Set register 0. This causes the sensor to enter a low power mode.

Message Explanation All serial interface communication with the sensor must begin with a start condition. If the start condition is followed by a valid address byte, then further communication is possible. This sensor will acknowledge receipt of a valid address by driving the SDA line low. The state stores the read/write bits (LSB of the address byte), and the next data byte sampled from sda can be interpreted.
In the write sequence, the second byte received is the address index to point to the internal register. The MSB of the following bytes is the index auto-increment flag. If this flag is set, the serial interface will automatically increment the index address by one location for each slave acknowledgement. Therefore, the master can continuously send data bytes to the slave until the slave fails to provide an acknowledgment, or the master terminates with a stop condition or sends a Repeated Start (SR). If the auto-increment feature is used, the host does not have to send the index to accompany the data bytes.
When the slave receives data, it is written to the serial/parallel register bit by bit. After each data byte has been received by the slave, an acknowledgment is generated, and then the data is stored in the internal register addressed by the current index.
During a read message, the current index is read in the byte following the device address byte.
The next byte read from the slave is the current register content index. The contents of this register are then loaded into the serial/parallel register in parallel and timed out from the device by the SCL.
At the end of each byte, in the read and write message sequence, by the receiving device. Although the VV6501 has always been considered a slave device, it acts as a transmitter when the bus master requests to read data from a sensor.

At the end of an incremental read or write sequence, the terminal index value in the register will be greater than the last position read or written from. Subsequent reads will use this index to start retrieving data from the internal registers.
A message can only be terminated by the bus master, either by issuing a STOP condition, or a repeated START condition or a negative acknowledgment after reading a complete byte during a read operation.
Types of Information This section provides basic guidelines for reading and writing data to and from the serial port.
interface.
The serial interface supports variable length messages. A message may contain no data bytes, one data byte, or multiple data bytes. This data can be written to or read from common or different locations within the sensor. The available description ranges are detailed below.
No data bytes are written, only the index of subsequent read messages is set.
Multi-position writes (using auto-increment index bits) are used for fast information transfer. Examples of these operations are given below. For a complete description of the internal registers see

I2C register registers Image sensor registers can be divided into 5 categories: Status registers (read only) Setting registers with bit valid functions Exposure parameters affecting the brightness of the output image Video timing functions Any internal registers that can be written can also be read from. There are a number of read-only registers that contain device status information (such as design revision details).
Names ending in h or l represent the most or least significant part of an internal register. Unused positions in the comment H byte are padded with zeros.
The detailed description of each register is as follows. The address index is displayed as a decimal number.

Exposure Control Registers There is a set of programmable registers that control the sensitivity of the sensor. The registers follow as follows:
Fine Exposure Coarse Exposure Time Analog Gain Clock Divide The gain parameter does not affect the integration period, but at the output stage of the sensor core.
Note: External exposure (coarse, fine, clock division or gain) values do not take effect immediately.
Data from the serial interface is read by the exposure algorithm at the beginning of the video frame. If the user reads the exposure value via the serial interface, the reported value will be the data so far.
Since the serial interface logic stores all data locally, it is not used by the exposed algorithm.
Write to the sensor.
Between writing the exposure data and using the exposure logic data, bit 0 sets the status register. The gain value is updated one frame after coarse, fine and clock division.
parameters, since the gain is applied directly to the video output stage, there is no need to set the time for thick and thin exposure and clock division.
To eliminate the possibility that the sensor array will only see part of the new exposure and gain settings, if the serial interface communication is extended to frame boundaries, the internal retiming will be disabled when writing data anywhere in the "Exposure" page" Exposure" and "Gain" data.
Serial Interface Register Map. Therefore, if the 5 bytes of exposure and gain data are sent in auto-incrementing order, it is unlikely that the sensor will consume only part of the new exposure and gain data.
The range of some parameter values is limited, and any value programmed out of range is clipped to the maximum allowed.