The FAN5091 is a synchronous multi-chip DC-DC regulator IC that provides a highly accurate, programmable output voltage for all high performance processors. The two interleaved synchronous buck regulator slices use built-in current sharing ing 180 ° out of phase to provide fast transient response required for high current applications while minimizing external components. The FAN5091 features remote voltage sensing and programmable active droop? The transient response of the converter with minimum output 100nsec put capacitors. It integrates high-current gate drivers, switches with adaptive delay gates, and eliminates the need for external hard drive devices. The FAN5091 uses a 5-bit D/ACON-converter to program an output voltage of 1.85V from 1.10V to 25mV steps with 1% accuracy. The FAN5091 features high integration, providing an excess of 50A of load current from a 5V supply with minimal external circuitry. The FAN5091 also provides integrated functions including power good, output enable/soft-start, under-voltage lockout, over-voltage protection, adjustable current limit with independent current sense on each chip. It is available in a 24-pin TSSOP package.

Application Information

The FAN5091 is a programmable synchronous multi-chip DC-DC controller IC. When properly designed around external components, the FAN5091 can be configured to provide more than 50A of output current to suit a new generation of high-current processors. The FAN5091 acts as a fixed frequency PWM buck regulator with high Efficiency mode (E*) at light loads.

main control loop

The FAN5091 is implemented by two interleaved synchronous buck conversion converters with sum-mode control. Each slice has its own current feedback and has a common voltage feedback. The two buck converters controlled by the FAN5091 are interleaved, that is, they are 180° out of phase, each and so on. This minimizes the RMS input ripple current, minimising the amount of input capacitance required for mizing. This also doubles the effective switching frequency, thereby improving transient response. The FAN5091 implements "summary-mode control", which is different from traditional voltage-mode and current-mode control. It provides excellent performance, both allowing a large converter bandwidth over a wide range of output loads and external components. The control loop of the regulator consists of two main parts: the analog control block and the digital control block. The analog section consists of a signal conditioning amplifier that feeds a comparator, which provides the input to the digital control block. The signal conditioning section receives input from the current sensor and the voltage sensor, with the input voltage sensor being a common piece, and the current sensor individually for each. The difference between the VFB signal and the reference voltage of the voltage sensor amplifier ES is presented from the DAC and output to each of the two comparators. For each slice, the current control path takes the difference between the ground and the SW pin when the low-side MOSFET is turned on, reproducing the voltage across the MOSFET and thus the input current; it presents the signal therefrom to It sums up the same input of the amplifier to increase the voltage of the signal amplifier with a certain gain. These two signals are thus added together. This sum is then pre-sented to compare looking at the oscillator ramp, which provides the main PWM control signal output to the digital control block. The oscillator ramps are each additionally 180° out of phase, so that the two chips alternate. The digital control block uses an analog comparator input to provide the appropriate pulses to the HDRV and LDRV output pins, per slice. These outputs control external power MOSFETs.

Remote voltage detection

The FAN5091 has a true remote voltage sensing function, which eliminates inating errors due to lead resistance. With remote sensing, the VFB and AGND pins should be connected as Kelvin tracking pairs to adjust points, such as processor pins. The converter will remain in regulation voltage at this point. Care is required for the layout of these grounds; see layout principles in this data sheet.

High Current Output Driver

The FAN5091 contains four high-current output drivers using push-pull configuration MOSFETs. The driver for the high-side MOSFET uses the BOOT pin for input power and the SW pin for the return. This driver is used for low-side MOSFET returns using the VCC pin for input power and the ground pin. Normally, the BOOT pin will use 12V directly. Note that the Boot and VCC pins are separated from the chip's internal power and ground, bypassed and AGND, for switching noise immunity.

Adaptive Delay Gate Drive

The FAN5091 embodies an advanced design while eliminating shoot-through current for the minimum transition time of the MOSFET. It detects the state of the MOSFETs and adjusts the gate driver adaptation to ensure they are never on simultaneously. When the high-side MOSFET turns off, the voltage at its source starts to drop. When the voltage reaches about 2.5V, the low-side MOSFET gate driver applies a delay of about 50nsec. When the low-side MOSFET is turned off, the voltage on the LDRV pin is sensed. when it falls below about 2V for high-side MOSFET gate drive applications.

maximum duty cycle

To ensure current sensing and charge pump operation, the FAN5091 ensures that the low-side MOSFET will be on for a certain portion of each cycle. For low frequencies, this occurs, as an approximation of the maximum duty cycle is around 90% or more. So at 500KHz, with a period of 2µs, the low end will be at least 2µs ~ 10% = 200nsec. At high frequencies, it may be ineffective at this time to fall so low. The minimum low-side of the FAN5091's guaranteed on-time is about 330nsec, regardless of the duty cycle.

Current Detection

The FAN5091 has two independent current sensors, one for each slice. Current sensing is accomplished by measuring the voltage at the source-drain low-side MOSFET and its on-time. Each slice has its own power ground pin, as per MIT slices are placed in different locations without affecting measurement accuracy. For best results, connect the ground and SW pins very thinly for each chip as a direct open-trace pair for the source and drain, respec- proper low-side MOSFET suspects. Nursing is required for placement on these grounds; see placement guidelines for the data sheet.