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2022-09-15 14:32:14
L6726A single phase PWM controller
Features
Flexible power supply from 5V to 12V
Power conversion input as low as 1.5V
1%output voltage accuracy
Large current integration Driver
The output voltage can be adjusted
0.8V internal benchmark
no sensor and programmable OCP
low side RDSON
oscillator Internal fixing at 270kHz
Soft start-programming
No load-free sensation start
Disable function
fb disconnection protection
SO- 8 Packaging
Application
subsystem power supply (MCH, IOCH, PCI…)
Modification and terminal power supply
CPU and DSP power supply
[ 123] Distributed power supplyGeneral DC/DC converter
Instructions
L6726A is a single -phase antihypertensive controller integrated large current drive complete control logic, protection and reference The voltage implementation simple and easy-to-universal DC-DC converter SO-8 package. Equipment flexibility allows management to transform the power supply input VIN as low as 1.5V and the voltage range of the equipment power supply is 5V to 12V. L6726A provides a simple control circuit with anti -conductive error placed. Integrated 0.8V benchmark allows the adjustment of the accuracy of the output voltage to change within the line and temperature range of ± 1%. The internal oscillator is fixed to 270kHz. L6726A provides programmable over -current protection. The RDSON that monitors the current information span of MOSFET saves sensory resistors with expensive and occupying space. FB disconnect protection to prevent excessive and dangerous output voltage pins FB when floating.
Table 4. Electrical characteristics (VCC u003d 12V; TA u003d 25 ° C, unless there are other regulations).
Table 4. Electrical characteristics (continued) (vcc u003d 12V; TA u003d 25 ° C, unless there are other regulations).
1. Design guarantee, without testing.
Device description
L6726A is a single -phase PWM controller, a built -in large current drive, providing complete control logic and protection, and realizing a universal DC DC drop Converser. The design is used to drive the N -channel MOSFET topology structure in the synchronous buck. Due to its high integration, the 8 -pin device allows reduction of cost and dimensional power solution. L6726A is designed at 5V or 12V power busWork. Thanks to the high -precision 0.8V internal reference, the output voltage can be accurately adjusted to the line and temperature change range below 0.8V, and the accuracy is ± 1%. The switch frequency is set to 270kHz. This device provides a simple control circuit error amplifier and programmable soft startup with external compensation cross -guidance. The low -side non -function allows the device to start softly on the pre -charged output to avoid negative peaks appearing on the load side. In order to avoid load damage, L6726A provides a programmable threshold over current protection. The output current is over low -side MOSFET RDSON monitoring, saving the sensory resistance and occupying space. L6726A also has FB disconnecting function protection to prevent dangerous uncontrollable output voltage when FB pins float.
The integrated large current drive allows using different types of power MOSFETs (also multiple MOSFETs to reduce equivalent RDSON) to maintain fast switching conversion. The driver of the high -voltage side MOSFET uses a starting pin to power, and the phase pins are used to return. This low -side MOSFET driver uses a VCC pin to power, and the GND pins are used for circuit. This controller contains a reflex wearing and adaptive dead zone control, which is low to minimize the diodes of the side diode. While maintaining good efficiency, it saves the use of the Schottky diode:
In order to check whether the high -voltage side MOSFET MOSFET Close, detect the phase pins. When the voltage decreases in the phase pins, the low side MOSFET gate driver suddenly apps
In order to check whether the low -voltage side MOSFET is closed, the LGATE pin is detected. When the voltage decreases, the high side MOSFET gate driver is suddenly applied. If the current in the inductors is negative, the voltage on the phase will never decrease. By the allowable MOSFET to be allowed, even in this case, the door dog controller is enabled: if the source of the high side MOSFET does not decrease, the low -side MOSFET is the negative current of the allowable sensor to be connected. This mechanism allows the system to adjust even if the current is negative. Power conversion input is flexible: 5V, 12V bus or any allowable conversion bus (see if you can select the maximum working cycle restriction and recommendation working conditions) freedom.
Power consumption
L6726A is high -current MOSFET driver in high and low -side MOSFET: IT and then consider the power consumed by the device when driving them. Operating temperature. There are two main factors in the power consumption of the device: bias power and driver power. Device bias power (PDC) depends on the provision of pins, which can be simply quantified (assuming that HS and LS have the same VCC device driver):
The power supply is The driver continues to open and close the external MOSFET; it is a driver and total grid charge selected by the function of the switch frequency. it canThe total power PSW (easy calculation) consumed by the quantification of the switch MOSFET is dissipated by the three main factors: the external grid resistor (when it exists), the internal MOSFET resistance, and the driving resistance of this sign. The last semester is the most important time to determine the power consumption of calculating device. The total power dissipates the MOSFET result:
Among the VBOOT-VPHASE is the voltage on the capacitor. The external grid resistance helps the device to dissipate the switch power, because the power PSW will be shared between the internal driver impedance and the external resistor and the device will generally cool down.
Soft start and disability
L6726a to achieve soft startup, charging the output filter steadily, avoiding the current of the current required to input the power supply. Essence The device provides a linear charging current of 10 μA soft startup compensation network capacitors. The slope compares the COMP voltage with the oscillator triangle wave to increase the width of charging the output capacitor. When the FB voltage exceeds 800mV, the output voltage is in the adjustment state: the soft start -up phase will end, and the cross -guided error placing output will be enabled and turned off the control loop. If the current appears during the soft start, the over -current logic will cover the soft startup sequence, and the PWM logic and high -voltage side and low -voltage side door will be closed. This situation is locked and the cycle is recovered. The device only provides a soft startup current threshold and overcurrent threshold settings when the VCC power supply is higher than UVLO.There is no startup (LSLESS)
L6726A performs a special sequence during the soft start, enabling the LS driver to switch the stage, and the LS drive results are disabled (ls u003d close) until Hs starts to start starting. Switch. This can avoid the danger negative peak on the output voltage. If it starts on the pre -charged output, and the output discharge is limited (the output discharge depends on the length of the program SS: the shorter the program SS, the more limited discharge of the output). If the output voltage is charged in advance to a voltage higher than the final voltage, HS will not start switching. In this case, LS is enabled and the output is released to the final adjustment value.
Enable/disable
Press the COMP/DIS pin at 0.4V (minimum) voltage to disable the device. In this case, HS and LS MOSFET are turned off, and the 10 μA SS current comes from the COMP/DIS needle. After release the pin, the device can perform new SS again.
Overcurrent protection
Overcurrent features are protected from short -circuit output or overload sensing through the following ways. The output current information of the low -side MOSFET leakage source is used. RDSON. This method can avoid the use of expensive and occupying a sensing resistance. Low -pressure side RDSON current detectionIt is held internally when the LS MOSFET is opened with the programming OCP threshold voltage. If the monitored voltage drop (GND to phase) exceeds this threshold, the current event is detected. If the two over -current event switching cycles are detected twice in a row, the protection will be triggered, and the device will close LS and HSMOSFET at the same time in a lock state. To recover from triggering over current protection, the VCC power supply must be circulated.
Over -current threshold settings
L6726A allows easy programming to program over 50mV to 550mv overcurrent thresholds, just add a resistance (ROCSET) between LGATE and GND. In a short time after VCC rose exceeded the UVLO threshold (5.5 millisecond-6.5 milliseconds), an internal 10 μA current (IOCSET) came from the LGATE pin to determine the voltage lowering through Losest. The voltage drop will be sampled and the current threshold will be maintained from the device. The total time length of the OC setting program is 5.5ms to 6.5ms, which is proportional to the set threshold. A ROCSET resistor is connected between LGATE and GND. The programming threshold will be:
The range of the ROCSET value from 5K u0026#8486; to 55K u0026#8486; If the voltage on the ROCSET is too low, the system will be very sensitive to the startup and noise. This may lead to unexpected OCP triggers. In this case, consider increasing the ROCSET value. If there is no connection to ROCSET, the device will switch the OCP threshold to the default value of 375mv: Once the LGATE voltage is reached, the internal safety pliers on the LGATE will be 700mV (typical), enable the 375MV default threshold, and suddenly end the OC setting stage. The OC threshold setting programmeal picture and oscilloscope example see Figure 6 waveform.
Feedback disconnection protection
In order to provide load protection without connecting the FB pin, the 100NA bias current is always from this pin. If the FB pin is not connected, the bias current will permanently pull the FB pressure to avoid rising to the low level.
Impurd voltage lock
In order to avoid the abnormal behavior of the device when the power supply voltage is too low to support its internal orbit, UVLO: when the VCC reaches, the device will Start the upper limit of the UVLO, and it will be closed when the VCC is lower than the lower limit threshold of the UVLO. 4.1V's maximum UVLO upper limit allows L6726A to from the bus from 5V and 12V power supply diode configuration.
Application details
Output voltage selection
L6726A can accurately adjust the output voltage band as low as 0.8V with a fixed fixed. 0.8V internal benchmark to ensure the output adjustmentThe voltage of the voltage does not include the temperature change of the temperature changes in the range of the resistance in the range of ± 1%(if any). By adding a resistor ROS between FB pins, the output voltage and ground higher than 0.8V can be obtained. For Figure 1, the stable DC output voltage is:
Compensation network
The control loop shown in FIG. 8 is the voltage mode control loop. The error release is a cross -guidance type, which has a fixed gain (a typical value of 3.3ms). The FB voltage is adjusted to the internal benchmark, so the output voltage is fixed according to the output resistor (if any). The cross -guided error placed output current generates a voltage on the ZF, that is, compared with the oscillator sawtooth wave, it provides a PWM signal for the driving part. The PWM signal is then transmitted to the connection node with VIN amplitude. This waveform is filtered by the output filter.
The transmission function of the converter is the output nodes of EA (Comp) and VOUT. This function has a bipolar (plurality together), the frequency FLC depends on the L-COUT resonance, and the FESR is zero depends on the output capacitance ESR. The DC gain of the modulator is only input voltage VIN except the peak oscillator voltage u0026#8710; VOSC. VOUT is zoomed out and transmitted to FB nodes through the output resistor. The compensation network is ideal equal to -gm · ZF through transmission to close the connection FB and COMP nodes. The goal of compensation is to close the control circuit to ensure that the accuracy of DC regulation is high, good performance and stability. To achieve this, the entire ring road requires high DC gains, good phase and high bandwidth. To achieve high DC gains, the compensation network transmission has the shape of the integral device. The ring bandwidth (F0DB) can be fixed by selecting the appropriate RF; however, for stability, it should not exceed FSW/2π. In order to obtain a good phase margin, the control circuit gain must be cross-0dB shaft, and the slope is -20db/decade. For example, FIG. 9 shows the getting closer to Podtu of Type II compensation.
Layout Guide
L6726A provides control functions and large current integrated drives to achieve a large current antihypertensive DC-DC converter. In this application, a good layout is very important and important. The first priority when placing components for these applications must be retained to the power supply part to minimize the length of each connection and circuit. To connect the noise and voltage peak (EMI and loss) power supply (highlighting the display graph 10) must be part of the power supply plane, and it must be tracked with wide and thick copper anyway: the cycle must be minimized. Key components, that is, power MOSFET, must approach each other. It is recommended to use a multi -layer printing circuit board.
Input capacitance (CIN), or part of the total capacitance, must be placedIn the place near the power segment to eliminate the traces of copper. Low ESR and ESL capacitors are the first choice. MLCC is recommended to connect near HS drainage pipes. When the power trace line must be to reduce the parasitic resistance and inductance of PCB. Furthermore, copying the same high -current trajectory on multiple PCB layers will reduce parasitic resistance related to that connection. Connect the output large -capacity capacitor (COUT) to the position closer to the load as much as possible, minimize the inductance and resistance related to the parasitic and copper traces, and increase the additional off -coupled electric container to the load. Bulk capacitors banks. The size of the door trajectory and the phase trajectory must determine the power MOSFET according to the transmitted driver. The robustness of the device allows management applications with powerful functions to stay away from the controller without losing performance. In any case, if possible, it is recommended to minimize the distance between the controller and the power part. Do you see the current path of the driver? The connection between small signal components and application key nodes, as well as power supply to the device, is also important. Positioning the barrier container (VCC and self -lifting capacitors) and circuit compensation elements as close to the device as practical as possible. In order to realize the programmability of overcurrent, the RocSet is close to the device and avoids that the leakage current on the LGATE/OC pins does not use the Schutki diodes and the low side MOSFET parallel system that may display the LGATE/OC pin. There are negative peaks on a large number of shortcomings. The peak must be limited to the rated value within the absolute maximum range (for example, a gate resistance is connected in series on the HS MOSFET gate, or a phase resistance string is connected to the pilot), but there is an additional result: resulting Self -up capacitors are overcharged. This additional cost can be reasons. In the stomach of the worst input voltage, the phase voltage is started to overcome the absolute maximum rated value and cause the device to fail. In this case, it is recommended to add a small resistance to the self -raising diodes (RD in Figure 1).
Embedded VRS -based VRS
When embedding virtual reality into the application, it must be careful, because VR is a switch -type DC/DC regulator The most common system that must work in it is the digital system, such as MB or similar system. In fact, the latest MBS becomes faster and faster: high -speed data bus is becoming more and more universal and switching noise. If it does not follow other layout guidelines, the data generated by VR may affect data integrity. When selecting a large path with a large amount of switching, a few simple point current flows must be considered (the high current of the switching and the high current will cause the trace line of the voltage spikes on the mixed inductor to affect the nearby trace line): When on the inner layer, When copying the high current path, keep the size of all layers the same to avoid the ""surrounding"" effect to increase noise coupling. Maintain a safe protection distance between the large current switch VR trajectory and the data bus, especially the high -speed data bus to reduce noisecoupling.When tracking the I/O subsystem routing deviation, keeping a safe protection distance or appropriate filtering must be walked near VR.The possible cause of noise may be located in phase connection, MOSFETS gate driver, and input voltage path (from input large -capacity capacitors and HS drain).If you do not insist on using the power ground plane, you must consider it.These connections must be careful of the data bus that is sensitive to noise.Because the noise generated is mainly due to the switching activity of VR, the noise transmission depends on the speed of the current conversion.In order to reduce the level of noise emissions, it is also possible. In addition to the previous guidelines, in order to reduce the current slope and increase the switching time: because the switching time is longer, this will cause the switch loss that must be considered in the system thermal design.