The AD8009AR is an ultra-high-speed current feedback amplifier with an impressive 5,500 V/µs slew rate resulting in a rise time of 545 ps, making it ideal as a pulse amplifier. The high slew rate reduces the effects of slew rate limitations resulting in the large signal bandwidth of 440 MHz required for high-resolution video graphics systems. Maintain signal quality over wide bandwidth, worst case distortion -40dBc@250MHz (G = + 10,1 V pp). For applications with multi-tone signals, such as IF signal chains, the third order achieves a 12dB intercept (3IP) at the same frequency. This distortion performance coupled with the current feedback architecture makes the AD8009 a flexible component of gain as a first-stage amplifier in the F/RF signal chain.

The AD8009 is capable of supplying over 175 mA of load power and will drive four back-end terminated video loads with differential gain and phase errors of 0.02% and 0.04, respectively, when maintained. The high drive capability is also reflected in the ability to deliver 10dBm of output power at 70MHz with a -38 dBc SFDR.

The AD8009 is available in a small SOIC package and will be offered over the -40°C to +85°C industrial temperature range.

The AD8009 is also available in a SOT-23-5 package and can operate over the commercial temperature range of 0C to 70C.

function block diagram

Frequency Response (MHz)

Large signal frequency response; G = +2 and +10

Frequency Response (MHz)

Distortion vs. Frequency; G = +2

maximum power dissipation

The maximum power that the AD8009 can safely dissipate is affected by the rise in junction temperature. The maximum safe junction temperature for plastic packaged devices is determined by the glass transition temperature of the plastic, which is approximately 150°C. Temporarily exceeding this limit may result in changes in parametric properties due to changes in stress imposed on the mold by wrapping.

Although the AD8009 has internal short-circuit protection, this can also be insufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curve.

application

All current feedback op amps suffer from stray capacitance on their -INPUT. TPC35 and 36 illustrate the AD8009

response to this capacitance. TPC 35 shows that the bandwidth can be extended by placing a capacitor in parallel with the gain resistor. small signal pulse

The response corresponding to this increase in capacitance/bandwidth is shown in TPC 36 . As a practical consideration, the higher the capacitance on the capacitor

-INPUT to GND, higher RF is required to minimize peaking/ringing. RF filter driver output drive capability, wide bandwidth and low distortion.

The AD8009 is ideal for creating gain blocks that can drive RF filters. Many of these filters require the input to be driven by a 50Ω source and the output to be terminated in 50Ω for the filter to exhibit its specified frequency response. TPC 37 shows the response of a filter for the circuit used to drive and measure frequency, a Wavetek 5201 tunable bandpass filter tuned to a center frequency of 50 MHz. The HP8753D network provides stimulus signals for the measurements. The analyzer has a 50Ω source impedance and the AD8009 high-impedance noninverting input used to drive the terminated cable is 50Ω.

The gain of the AD8009 is set to +2. The output of the series 50Ω resistor, and the 50Ω termination provided by the filter for its termination, produces an overall unity gain path for the measurement. The frequency response curve of the TPC 38 shows an insertion loss of 1.3 dB in the passband of this circuit

75 dB rejection in stopband.

Additional high-resolution monitoring using three AD8009 drivers

RGB monitor driver

High-resolution computer monitors require very high full-power bandwidth signals to maximize their display resolution. The RGB signals that drive these monitors are typically provided by a current output RAMDAC that can directly drive a 75Ω double voltage termination line. Sometimes it is necessary to deliver the same output to additional monitors terminated by an internal supply each monitor prohibits simply connecting a second monitor to monitor in parallel with the first. Additional buffering must be provided. The diagram above shows a connection diagram of two high-resolution monitors driven by the ADV7160 or ADV7162, 220 MHz (megapixels per second) triple RAMDAC. This pixel rate requires the full power bandwidth of the driver to be at least half its pixel rate or 110 MHz. This is to provide good resolution for worst-case signals that oscillate between zero and full scale on adjacent pixels. The main monitor is connected conventionally with a 75Ω ground terminated cable at each end of the 75Ω. This configuration is sometimes called "double terminated" and uses a current source when the driver is high output impedance. For additional monitors, each RGB signal close to the RAMDAC output is applied to the high input impedance, non-inverting input of the AD8009 with a gain of +2. This output has a 75Ω resistor in series with each driver, cable and termination. Therefore, the resistors in the monitor divide the output signal by 2 to provide an overall unity gain. This scheme is called "rear connection" and uses an impedance voltage source when the driver output is low. The back end needs the signal voltage to be twice the value seen by the monitor. Double termination requires the output current to double the value flowing in the monitor termination.

Driving capacitive loads

Capacitive loads, as seen with some A/D converters, can sometimes be a challenge for op amp drive dependent on the op amp's architecture. Most of the problems are caused by the poles created by the op amp and the output impedance of the capacitor being driven. This creates additional phase shift that will eventually cause the op amp to become unstable. One way to prevent instability and improve settling time to drive the capacitor is to place a resistor in series between the op amp output and the capacitor. The feedback resistor is still directly connected to the output of the op amp, while the series resistor provides some capacitive isolation of the op amp output.

The figure above shows the AD8009 driving a circuit loading of 50 pF. When RS = 0, the AD8009 circuit will be unstable. To obtain +2 and +10 for a, it was found experimentally that setting RS to 42.2Ω minimizes the settling time by 0.1% with a step size of 2V output. The measured 0.1% settling time for this circuit is 40ns. For smaller capacitive loads, a smaller RS will yield the best settling time, while larger capacitors require a larger RS load. Of course, larger capacitors will always require more time to determine accuracy than less time, which will be extended due to the increase in RS required. At best, a given RC combination will require about seven time constants to receive 0.1% individually, so will also reach the limit that large capacitors cannot be driven by a given op amp and still meet the required settling time specification for the system.