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2022-09-23 12:45:58
ZNBG4000 ZNBG4000 ZNBG4001 This device provides drain voltage and current control for a range of external ground-based power sources
Device Description The ZNBG series devices are designed to meet the bias requirements of both GAAS and HEMT FETS used together in satellite reception LNBS, PMR, cellular phones, etc., with minimal external components. Together with two capacitors and resistors, the device provides drain voltage and current control for a range of external ground-based power sources, producing a regulated negative rail required for single-supply operation. This negative offset, at -3 volts, can also be used to supply other external circuits.
Functional Description ZNBG devices provide all biasing requirements for external FETs, including the negative supply required to generate gate bias from a single supply voltage. The image above shows a single stage of the ZNBG series. ZNBG4000 /1 contains 4 stages, ZNBG 6000 /1 contains 6 stages. The negative rail generator is a common part of all devices. The drain voltage of the external FET QN is set by the ZNBG device to its normal operating voltage. This is determined by the onboard VD setting reference, which is nominally 2.2 volts for the ZNBG4000/6000 and 2 volts for the ZNBG4001/6001. The drain current of the FET is sensed and monitored by a low value resistor ID. The amplifier driving the gate of the FET adjusts the gate voltage of QN so that the drain current taken matches the current required by the external resistor RCAL. Both ZNBG devices can program different leakage currents into selected FETs. Two RCAL inputs are provided. For the ZNBG4000, resistor RCAL1 sets the leakage current of FETs 1 and 2, and resistor RCAL2 sets the leakage current of FETs 3 and 4. For the ZNBG6000, resistor RCAL1 sets the leakage current of FETs 1 and 4, and resistor RCAL2 sets the leakage current of FETs 2, 3, 5 and 6. Since the FET is a depletion transistor, it is usually necessary to drive its gate negative with respect to ground to obtain the required leakage current. To provide this ability to be powered by a single positive supply, the device includes a low current negative supply generator. This generator uses an internal oscillator and two external capacitors, CNB and CSUB.
Application Information Above is a partial application circuit for the ZNBG series showing all external components required for proper biasing. The bias circuit is unconditionally stable over the full temperature range, and there are associated FETs and gate-to-drain capacitors in the circuit. Capacitors CD and CG ensure that residual power supply and baseboard generator noise are not allowed to affect other external circuits that may be sensitive to RFI. They can also suppress any potential RF feedthrough between stages through ZNBG equipment. These capacitors are required for all stages of use. 10nF and 4.7nF are recommended respectively, but it depends on the design and any value between 1nF and 100nF can be used. Capacitors CNB and CSUB are the components of the ZNBGS negative power generator. The negative bias is generated on-chip by the internal oscillator. The required value of capacitors CNB and CSUB is 47nF. This generator produces a low current power supply of about -3 volts. Although this generator is only used to bias external FETs, it can power other external circuits through the CSUB pin. Resistors RCAL1/2 set the drain current for all external FETs to operate. Both ZNBG devices can program different leakage currents into selected FETs. Two RCAL inputs are provided. For the ZNBG4000, resistor RCAL1 sets the leakage current of FETs 1 and 2, and resistor RCAL2 sets the leakage current of FETs 3 and 4. For the ZNBG6000, resistor RCAL1 sets the leakage current of FETs 1 and 4, and resistor RCAL2 sets the leakage current of FETs 2, 3, 5 and 6. If all FETs on any one device require the same drain current, then pins RCAL1 and RCAL2 can be tied together and shunted to ground through a half-normal value calibrated resistor. If any bias control circuit is not required, its associated drain and gate connections may be left open without affecting the operation of the rest of the bias circuit. If all FETs related to the current setting resistors are omitted, the specific RCAL should still be included. If desired, supply current can be reduced with a high value RCAL resistor (eg 470K).
Application Information (continued) ZNBG devices are designed to protect external field effect transistors from adverse operating conditions. When the JFET is connected to any bias circuit, the gate output voltage of the bias circuit must not exceed the range of -3.5 V to 0.7 V under any circumstances, including power-up and power-down transients. If the negative bias generator is shorted or overloaded so that the drain current of the external FET becomes uncontrollable, turn off the drain power to the FET to avoid excessive drain current that could damage the FET. The figure below shows the ZNBG4000/1 and ZNBG6000/1 in a typical LNB application. Within each FET gain stage, a numbering system indicates the relationship of the bias stage to the application circuit. This is important when the RCAL value is used to set different drain currents.
Dual Standard or Enhanced LNB Block Diagram
Dual standard or enhanced LNB block diagram. high gain