DS1305 Real Time...

  • 2022-09-23 12:47:03

DS1305 Real Time Clock

The DS1305 Serial Alarm Real Time Clock provides a complete binary coded decimal (BCD) clock calendar, accessible through a simple serial interface. Clock/Calendar provides seconds, minutes, hours, day, day, month and year information. Month-end dates are automatically adjusted for months with fewer than 31 days, including corrections for leap years. The clock runs in 24-hour or 12-hour format with AM/PM indicators. In addition, 96 bytes of NV RAM is provided for data storage. As long as the oscillator is enabled, the DS1305 will keep the time and date as long as at least one supply is at a valid level. The interface logic supply input pin (V CCIF) allows the DS1305 to drive the SDO and active-low PF pins to levels compatible with interface logic. This allows for easy connection of 3V logic in hybrid powered systems.

The DS1305 provides dual power and battery input pins. Dual power supplies support a programmable trickle charge circuit, allowing rechargeable energy sources such as supercapacitors or rechargeable batteries to be used for backup power. The VBAT pin allows the device to be backed up by a non-rechargeable battery. The DS1305 operates from a voltage range of 2.0V to 5.5V. The DS1305 provides two programmable clock alarms. Each alarm can generate interruptions on programmable combinations of seconds, minutes, hours and days. A "don't care" state can be inserted into one or more fields if it is desired to ignore them under alarm conditions. Clock alarms can be programmed to assert two different interrupt outputs or to assert a common interrupt output. Both interrupt outputs operate when the device is powered by V CC1, V CC2 or V BAT. The DS1305 supports direct serial peripheral interface SPI™ to serial data port or standard 3-wire interface. A simple address and data format is implemented where data transfers can be sent 1 byte at a time or occur in multi-byte burst mode.

figure 1

accurate clock

The accuracy of the clock depends on the accuracy of the crystal and how well the matching is trimmed between the capacitive load of the oscillator circuit and the capacitive load to which the crystal is placed. Crystal frequency drift due to temperature drift adds additional error. Circuit noise externally coupled to the oscillator circuit can cause the clock to run fast.

figure 2

Clock, Calendar and Alarm

Time and calendar information is obtained by reading the appropriate register bytes. The RTC registers and user RAM are shown in Figure 2. The time, calendar and alarm are written to the appropriate register bytes by setting or initialization. Note that some bits are set to 0. Those bits always read as 0 no matter how they were written. Also note that registers 12h to 1Fh (read) and registers 92h to 9Fh are reserved. These registers always read as 0 no matter how they are written. The time, calendar and content alarm registers are in BCD format. The date register is incremented at midnight. The corresponding value day of the week is user-defined, but must be sequential (for example, if 1 equals Sunday and 2 equals Monday, then on). Illogical time and date entries result in undefined operation. Unless otherwise specified, the initial power-up state of all registers is undefined. Therefore it is very important to enable oscillator (EOSC = 0) and disable write protection (WP = 0) during initialization configuration.

Write to the clock register

The internal time and date registers continue to increment during write operations. However, the countdown chain is reset when the seconds register is written. Data consistency is ensured one second after the time and date registers are written to the seconds register. Terminating the write operation before the last bit is sent will abort the write operation for that byte.

Table 1

read from clock register

The buffer is used to copy the time and date registers at the start of a read. In read-on-burst mode, the user copy is static, while the internal registers continue to increment.

The DS1305 can operate in 12-hour or 24-hour mode. Bit 6 of the hour register is defined as the 12 or 24 hour mode selection bit. When high, select 12-hour mode. In 12-hour mode, bit 5 is the AM/PM bit, and a logic high is PM. In 24-hour mode, the 5th digit is the second 10-hour digit (20 to 23 hours). The DS1305 contains two clock alarms. Time alarms 0 to 8Ah can be set by writing to register 87h. Clock Alert 1 can be set by writing to registers 8Bh to 8Eh. Alarms can be programmed (via the INTCN bit of the control register) to operate in two different modes; each alarm can drive its own independent interrupt output or both alarms can drive a common interrupt output. Each bit 7 of the Clock of Daily Alarm register is a mask bit (Table 2). When all mask bits are logic 0, the time alarm will only occur once a week when the value stored in the timer is recorded as 00h to 03h. Matches the value stored in the time date alarm register. An alarm is generated every day when bit 7 of the day alarm register is set to logic 1. An alarm is generated every hour when bit 7 of day and hour The alarm register is set to logic 1. Similarly, day, hour and minute alarms When bit 7 of the register is set to logic 1, an alarm is generated every minute. The day, hour, minute and second bit 7 of the alarm register is set to logic 1 and an alarm occurs every second. During each clock update, the RTC compares the Alarm 0 and Alarm 1 registers with the corresponding clock registers. When a match occurs, the corresponding alarm flag bit in the status register is set to 1. If the corresponding alarm interrupt enable bit is enabled, the interrupt output is activated.

Table 2