Features

Suitable for car applications

AEC-Q100 test guide, including the following:

-Device temperature level 1:- 40 ° C to+125 ° C The environment of the environment

-Equipment HBM ESD classification level:

-

OPA171-Q1 3A

-

OPA2171-Q1 level 3A

-2

OPA4171-Q1

-Device CDM ESD classification level

--Pa171171 -QA C4A Class

-OPA2171-Q1 C6

-OPA4171-Q1 C6

Power range: 2.7 to 36 V, ± ± 1.35 to ± 18 v

Low noise: 14 nv/√Hz

Low offset drift: ± 0.3 μV/° C (typical value) [123 123 ]

RFI filter input

input range includes negative power

8226; Rail -to -track output

gain bandwidth: 3 mHz

Low static current: each amplifier 475μA

high Common model suppression: 120 dB (typical value)

Low input bias current: 8 PA

Industry standard package:

- 5 Package SOT-23 (DBV) package

Application

Track amplifier in the power module

Commercial power supply

[[

[[

[[

[[

[[

[ 123] sensor amplifier

Bridge amplifier

Temperature measurement

123] Precision Pointer

Battery power supply instrument

Test equipment

OPA171-Q1 The series device is a 36V, single power supply, low noise operation amplifier (operation amplifier), which can be in 2.7 volts(± 1.35 volt) work on the power supply from 36 volts (± 18 volts). The device uses a miniature packaging to provide low offset, low drift and low static current bandwidth. Single, double and four versions have the same specifications to achieve the maximum design flexibility.

Equipment information (1)

(1), please refer to the doctor's order content at the end of the data table.

The offset voltage and the common mode voltage

The offset voltage and power supply

and most of the majority of the majority Different computing amplifiers specified at a power supply voltage, the voltage range of the OPAX171-Q1 series device is 2.7 to 36 V. The input signal beyond the power guide rail does not cause phase reversal. OPAX171-Q1 series device is stable when the capacitor load is as high as 300 PF. During the normal operation, the input can work within the range of 100 millivolves and top rails under the scope of corruption. The device can run under the input of 100 MV full rails exceeding the top orbit, but the performance is reduced within the range of the top track 2 V.

OPAX171-Q1 The prescribed temperature of the operation amplifier is -40 ° C to+125 ° C.

Typical features

vs ± 18 v, vcm vs/2, RLOAD 10 kΩ, connected to VS/2, CL 100 PF, unless otherwise explained.

Detailed explanation Overview OPAX171-Q1 series operational amplifier provides high overall performance, making it an ideal choice for many general applications. The excellent offset drift of only 1.5 μV/° C (maximum value) provides excellent stability throughout the temperature range. In addition, the device provides a very good overall performance to high -co -model suppression ratio, power suppression ratio, AOL and superior THD. Figure Figure

Feature description

Operating features

OPAX171-Q1 series equipment work voltage is 2.7 to 2.7 to to 36 V (± 1.35 to ± 18 V). Many specifications are suitable for -40 ° C to+125 ° C. The typical feature part shows a significant parameter related to working voltage or temperature.

Phase protection

OPAX171-Q1 series equipment has internal phase reversal protection. When the input is driven by its linear co -modular range, many operational amplifiers will appear in phasechange. This situation is the most common in non -switching circuits. When the input is driven to the co -mode voltage range that exceeds the specified specified, the output reverse into the opposite track. The input of OPAX171-Q1 series device can prevent the phase reversal when the co-mode voltage is too high. Instead, the output is limited to the appropriate track. Figure 37 shows this performance.

Capacity load and stability

OPAX171-Q1 series devices' dynamic characteristics have been optimized for common operating conditions. The binding of low -closed cycle gains and high -inclusive loads reduces the phase margin of the amplifier and may lead to peak or oscillation of gain. Therefore, the heavier capacitance load must be isolated from the output. The easiest way to achieve this isolation is to connect a small resistance in series at the output end (for example, ROUT is equal to 50Ω). Figure 38 and Figure 39 show the relationship between the small signal super -adjustment and the capacitance load of several ROUT values.

Equipment function mode

Commonly mode voltage range

input co-mode voltage range of OPAX171-Q1 series devices is extended below tracking 100 millivolo, within the 2V range of the rail during normal operation.

This device can run under the entire rail input of 100 MV outside the top rail, but the performance is reduced within the range of the top rail 2 V. Table 2 summarizes the typical performance within this range.

Application and implementation

Note

The information in the following application chapters is not part of the TI component specification. TI does not guarantee its accuracy Or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

OPAX171-Q1 operational amplifier provides high overall performance, making it an ideal choice for many general applications. The good offset drift of only 2 μV/° C provides excellent stability throughout the temperature. In addition, the device has the overall performance of CMRR, PSRR and AOL. Like all amplifiers, the application of noise or high -impedance power supply requires the deserted off -coupled capacitors close to the device pin. In most cases, 0.1-μF capacitors are enough.

Electrical Overwhelming

Designers often ask the capacity of transportation amplifiers to withstand excessive electrical stability. These problems are often concentrated on the device input, but may involve the power supply voltage pins and even output pins. Each different pins function has the electrical stability limit determined by the voltage breakdown characteristics of a specific semiconductor manufacturing process and a specific circuit connected to the pin. In addition, internal electrostatic discharge (ESD) is protected in these circuits to prevent an ESD incident that occurs before and in the process of product assembly.

These ESD protection diode also provides the input driver protection in the circuit, as long as the current is limited to 10 mAh, as described as the absolute maximum rated value table. Figure 40 shows how to add the series input resistance to the driver input to limit the input current. The increased resistance generates thermal noise at the amplifier input terminal, and its value should be kept at the minimum value in the application of sensitivity to noise.

The ESD event generates a high -voltage pulse with a short duration. When it discharge through semiconductor devices, the pulse is converted into a short -time large -current pulse. The ESD protective circuit design is used to provide a current circulation around the core of the computing amplifier to prevent it from being damaged. The energy absorbed by the protective circuit was subsequently lost in the form of heat.

When the operational amplifier is connected to the circuit, the ESD protection component will maintain a non -activity state and will not participate in the operation of the application circuit. However, when the external voltage exceeds the operating voltage range of the given pin, this may occur. If this happens, there are risks that some internal ESD protection circuits may be biased and transmitted. Any current is generated by electrostatic discharge units, which rarely involves an absorption device.

If the capacity of the power absorption current is uncertain, you can add an external Qina diode to the power pins. The Qina voltage must be selected so that the diode will not be turned on during the normal operation.

However, Qina's voltage should be low enough to rose to the power supply of the power supply at the level of the safe working power supply level.

Typical application

The capacitor load driving solution using isolation resistance

OPA171-Q1 device can be used for capacitance loads, such as cable shielding, reference buffer, MOSFET gate gate And diode. The circuit uses isolation resistance (RISO) to stabilize the output of the amplifier. RISO has adjusted the system's opening gain to ensure that the circuit has sufficient phase habits.

Design requirements

The design requirements are:

Power supply voltage: 30 v (± 15 v)

capacitance load: 100 PF, 1000 PF, 0.01 μF, 0.1 μF, 1 μF

Design program

FIG. 42 shows a unit gain buffer that drives the capacitance load. Formula 1 shows the transmission function of the circuit in Figure 42. Figure 42 does not display the opening output resistance of the operation amplifier.

The transmission function in the equation 1 has pole and zero point. The frequency of pole (FP) is determined by (RO+Riso) and CLOAD. Ingredients RISO and CLOAD determines the frequency of zero point (FZ). By selecting RISO, the closed rate (ROC) between the opening gain (AOL) and the 1/β is 20DB/Decade, and a stable system is obtained. Figure 42 shows this concept. The 1/β curve of the unit gain buffer is 0 dB.

ROC stability analysis is a typical simulation. The effectiveness of the analysis depends on multiple factors, especially the accuracy of the reverse osmosis model. In addition to simulating ROC, robust stability analysis also includes the use of function generators, oscilloscope, gain, and phase analyzer measurement circuit to measure the percentage percentage and the peak of AC gain. Calculate the phase margin based on these measurement values. Table 3 lists the peak of overwhelming percentage and AC gains corresponding to 45 ° and 60 ° with the phase. For detailed information about this design and other replacement of OPA171, please refer to the precision design capacitor load driving solution (TIPD128) using a quarantine resistor (TIPD128).

Application curve

OPA171-Q1 device to meet the power voltage requirements of 30 V. Various capacitance load tests were performed on the OPA171-Q1 device, and RISO was adjusted to achieve the over-adjustment shown in Table 3. Figure 43 shows the test results.

Power suggestion

OPAX171-Q1 series equipment is stipulated in 4.5 V to 36 V (± 2.25 V to ± 18 v); many specifications are applicable From -40 ° C to+125 ° C. Parameters related to work voltage or temperature are given in the typical feature part.

Pay attention to safety

The power supply voltage greater than 40 V may permanently damage the device; please refer to the absolute maximum rated table.

The 0.1-μF bypass electric container closer to the power supply foot to reduce the coupling error of noise or high impedance power supply. For more information on the side electric container, see the layout part.

Layout

layout guide

In order to obtain the best operating performance of the equipment, please use a good print circuit board (PCB) layout practice, including:

] noise can be spread to the simulation circuit through the power pins of the entire circuit and the throughput of the entire circuit. The barrier container is used to reduce the coupling noise by providing a low -impedance power supply of an analog circuit.

-Colin the low ESR and 0.1-μF ceramic side electric container between each power supply foot and ground, and as close to the device as much as possible. Single -width capacitors from V+to the ground are suitable for single power applications.

Circuit simulation and the individual grounding of the digital part are one of the simplest and most effective noise suppression methods. Multi -layer printing circuitOne or more layers on the board are usually used for ground layers.The floor helps to distribute heat and reduce the noise of electromagnetic interference.Ensure that the number of numbers and simulation of the ground is separated, and the flowing current flows.For details, see Sloa089 circuit board layout technology.

In order to reduce parasitic coupling, the input trajectory should be as far away from the power supply or output trajectory as much as possible.If it is impossible to separate them, it is best to be perpendicular to sensitive records instead of parallel with noise recorded channels.

The external components are as close to the device as possible.As shown in Figure 44, keeping RF and RG approaching inverter inputs can minimize parasitic capacitors.

The length of the input record should be as short as possible.Always remember that the input trajectory is the most sensitive part of the circuit.

Consider setting a driver's low impedance protection ring around the key line.The protective ring can significantly reduce the leakage current of different potentials nearby.

layout example