The gate driver HIP2101IB is a high frequency, 100V half-bridge n-channel power MOSFET driver chip equivalent to the HIP2100 with the added advantage of full TTL/CMOS compatible logic input pins. Gate Driver HIP2101IB The low-side and high-side gate drivers are independently controlled and matched to 13ns. This gives the user complete control over the dead time of a specific power circuit topology. Undervoltage protection of low-side and high-side power supplies reduces output power. On-chip diodes eliminate the need for discrete diodes with other driver chips. A new topology of the stage shifter is proposed, which reduces the power consumption of pulsed operation on the premise of ensuring the safety of DC operation. The gate driver HIP2101IB differs from some competitors in that the high-side output returns to the correct state after a brief brown-out of the high-side supply.

Gate driver HIP2101IB Drives n-channel MOSFET half bridges SOIC, EPSOIC, QFN and DFN package options SOIC, EPSOIC and DFN packages comply with 100 v conductor spacing guidelines ipc-2221? Pb-free products (lead-free certified)? Boot max Voltage to 114 v DC? On-chip 1? Bootstrap diode Multi-MHz circuit?? Fast propagation time to drive 1000 pf load Typ rise and fall times. 10 ns? TTL/CMOS input threshold for increased flexibility? Independent input Non-Half bridge topology? No start-up issues? Wide? Supply Low Voltage Protection Device? 3? Output Drive Resistor? QFN/DFN Package: - Compatible Level PUB95 mo - 220 QFN Flat Iota Trail - Package Outline Near Package Footprint, Chip Scale, Improved PCB Efficiency and Thinner Profile File Applications? Telecom Half-Bridge Power Supplies? Aviation DC-DC Converters? Two-Switch Forward Converter? Positive Forward Clip Converter Inch and tolerances are in accordance with ASME Y14.5M-1994. 2. N is the number of terminals. 3.Nd is the number of D.4 terminals. All dimensions are in millimeters. Angle is in degrees. 5. Dimension b is for metallized terminals, measured 0.15mm to 0.30mm from the tip of the terminal. 6. The configuration of the pin #1 identifier is optional, but must be located within the designated area. The pin #1 identifier can be a die or marker feature. 7. Dimensions D2 and E2 are for exposed pads for better electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB ground pattern design efforts, see Intersil Technical Brief TB389. 9. Complies with JEDEC MO-229-VGGD-2 Question C, except for L dimension.

Shenzhen Tianzhuo Weiye Electronics Co., Ltd.

In the past 10 years, Shenzhen Tianzhuo Weiye Electronics Co., Ltd. has seized the historical opportunities brought by China's reform and opening up and the rapid development of the electronics industry, adhered to customer-centricity and high-quality products as the foundation, and provided customers with one-stop procurement services for components. Won the respect and trust of customers, from an entrepreneurial company based in Huaqiangbei, Shenzhen Special Economic Zone, China, it has grown steadily into an electronic component supplier with several well-known brand product lines and customers in many countries and regions around the world. The electronic IC and 3C distributed and wholesaled sell well in the consumer market and enjoy a high status among consumers. The company has established long-term and stable cooperative relations with many retailers and agents.