LT1431IS8#PBF...

  • 2022-09-24 20:26:29

LT1431IS8#PBF SMD SOP8 power management specification information

Functional Description Programmable Reference Power Management LT1431IS8#PBF

The LT?1431 is an adjustable shunt regulator with 100mA sink capability, 0.4% initial reference voltage tolerance and 0.3% typical temperature stability. On-chip divider resistors allow the LT1431 to be configured as a 5V shunt regulator with 1% initial voltage tolerance, power management LT1431IS8#PBF requires no additional external components. By adding two external resistors, the output voltage can be set to any value between 2.5V and 36V. The nominal internal current limit of 100mA can be reduced by including an external resistor. Power Management LT1431IS8#PBF A simplified 3-pin version, the LT1431CZ/LT1431IZ, can be used as an adjustable reference and is pin compatible with the power management LT1431IS8#PBF

COLL (Pin 1): Turns on the collector of the output transistor. The maximum pin voltage is 36V. The saturation voltage at 100mA is about 1V. (Pin 2): The base of the output transistor driver. This pin allows additional compensation for complex feedback systems and shutdown regulators. If not used, it must be left open. V+ (Pin 3): Bias voltage for the entire shunt regulator. The maximum input voltage is 36V and the minimum operating voltage is VREF (2.5V). Quiescent current is typically 0.6mA. RTOP (Pin 4): The top of the on-chip 5k-5k resistive divider acts as a 5V shunt regulator with no external trim and guarantees 1% accuracy of operation. This pin is tied to COLL and can operate independently at 5V. It may remain open if not used. See description of parasitic diodes below. GND-S (Pin 5): Ground reference for the on-chip resistor divider and shunt regulator circuits, except for the output transistors. This pin allows external current limiting of the output transistor with a resistor between GND-F (force) and GND-S (sense). GND-F (Pin 6): The emitter of the output transistor is connected to the die's substrate.

RMID (Pin 7): Located in the middle of the on-chip resistor divider string between RTOP and GND-S. The pin is tied to REF for self-contained 5V operation. It may remain open if not used. REF (Pin 8): Shunt Regulator Control Pin with 2.5V Threshold. If V+ > 3 V, the input bias current is canceled to reduce IB by 0.2µa typ. COMP, RTOP, RMID and REF all have static discharge protection circuits and cannot be activated continuously. Therefore, the absolute maximum DC voltage on these pins is 6V, which is well above normal operating conditions. Like all bipolar integrated circuits, the LT1431 contains parasitic diodes and cannot be forward biased, as this will cause abnormal behavior. Pin conditions to avoid are voltages where RTOP is below RMID and any voltage below GND-F (except GND-S). The pin definitions below apply to the Z package. Cathode: Corresponds to COLL and V+ connected together. Anode: Corresponds to GND-S and GND-F connected together. REF: corresponds to REF.