BQ29311 is a three...

  • 2022-09-16 16:00:09

BQ29311 is a three or four batteries lithium ions or lithium polymer battery protection IC

Features

3 core or 4 -core series protection control

Automatic overcurrent and short circuit protection

Provide a single battery voltage to the battery management host

Integrated unit balance control

The user interface compatible with I2C allows access to the battery information

The active user control

#8226; Integrated 3.3-V 25 mAh LDO

Able to switch and power off control

Provide drivers for three external FET

Typical 140 μA low power current

Short -circuit current Protectable programming threshold and delay

Provide drivers for three external FET

/5 interface, realize a complete battery management solution

Application

notebook computer battery pack #8226 ;

Test equipment

Description

BQ29311

is a three -core or four -core lithium -ion battery pack protection analog front -end (AFE) integrated circuit, integrated 3.3 3.3 Voltage 25 mAh low -voltage difference (LDO) and interfaces compatible with I2C can extract battery parameters, such as battery voltage and control output state. Other parameters, such as over -current protection threshold and delay, can also be programmed to BQ29311 to increase the flexibility of the battery management system.

BQ29311 provides security protection under the control of the battery management host through the control of the battery management host. In the case of over -current and short circuits, BQ29311 can directly activate the FET drive as a secondary protection level. The communication interface allows the host to control and observe the current status of protection. Set over current and overload levels, set over current and overload dismissal delay time, short -circuit threshold level, and short -circuit removal delay time, and the turnover voltage and power failure detection of VREG Programming the threshold.

Each batterThe register is enabled. The maximum current is set by an external series resistor, and the absolute maximum discharge current of each battery is 10 mAh.

pin allocation

Order information

Figure Figure

[ [ 123]

AC regular specification (i2C compatible serial interface)

Application information

When selecting

, the maximum potential charging voltage should be considered when selecting the resistance value. The voltage should include the voltage of the fault charger to ensure that the current level of 0-V and pre-charging mode is within the ideal range under all conditions.

This method can ensure that the size of the resistor is correct to provide a safe zero voltage charging and the best pre -charging performance.

Function description

Integrated regulator

The input of this regulator comes from the battery pack or battery pack positive extremes, the effective range is vsd To 25 V. These two power supply input is or inside. A external diode is needed to protect unprepared charging. The output is usually 3.3 v ± 5%(TA 25 ° C to 85 ° C), and the maximum output current is 25 mA. The stable output capacitance is usually 1 μF. The output voltage line between VSD and 25 V is adjusted to ± 20 MV (maximum value). In the current range of 0, the load adjustment is ± 20 mv (maximum value). 1 mia to 25 mAh.

Only when VPACK reaches effective input voltage, the regulator output starts. After reaching this voltage, even if the VPACK voltage is removed, it will power the BIOS from the battery to the BIOS of the regulator via VBAT.

Torter and power outage

If the voltage at VBAT is lower than 7.975 V ± 5%(default value), BQ29311 is set to the BRWO position to 1 in state (B4) and triggers Xalert output Essence The value in the SDV register (B4 B7) determines the threshold, which can be programmed from 7.975 V to 12.475 V under 0.3 V step (the accuracy of the decrease edge is ± 5%), and it has a lagging of 50 mV ± 30%lag. Essence

The read status register will remove Xalert in Brownout, but OCL (Control, B0) must be from 0 to 1 to 0; then the state must be read to remove the BRWO bit.

If the voltage at VBAT is lower than 6.475V ± 5%(default value), the regulator can be turned off. SDV register (B0 3) The value of the medium determines the threshold. This threshold can be programmed from 6.475 V to 10.975 V, the step length is 0.3 V, the accuracy of the decrease edge is ± 5%, and the lag is 50 mv ± 30%.

When the input voltage is lower than the shutdown threshold and the VPACK does not have higher voltage, set SHDN (status, B5), BQ29311 into the dormant mode and close CHG, DSG and PCHG. The current in this mode consumes less than 1 μA. When the input voltage is higher than the shutdown threshold, the SHDN is cleared. Xalert does not respond.

Overclocking, overload, short -circuit detection

overcurrent, overload and short -circuit detection are used to detect abnormal currents in charging or discharge directions. This security characteristics are used to protect PASS FET, battery, and any other inner associated components from excessive current conditions. The detection circuit also includes the control of the PASS FET that is used to turn off the interruption.

Over -current, overload, and short -circuit thresholds are set in OCVD/C and SCV registers, and the default values u200bu200bare 50 mv and 100 MVs, respectively. A single over -current (charging) and overload (discharge) threshold can be programmed from 50 MV to 205 MV, the steps are 5 mv, and the lag is 10 mv ± 30%. A single short -circuit threshold is programmable from 100 MV to 475 MV, the step length is 25 MV, and the lag is 50 mv ± 20%.

Overclocking, overload, short -circuit latency

overcurrent and overload delay allows the system to accept high current state instantly. The default current delay is 1ms. The delay time can be increased through the OCD register, which can be independently defined with overcurrent and overload delay. The programmable range of the OCD register is 1 ms to 31 ms, and the step length is 2 ms.

The default value of short -circuit delay is 0 milliseconds, and it can also be programmed in the SCD register. The register is programmable to 0 to 915 μs and the step length is 61 μs.

Overclocking, overload and short -circuit response

When the current, overload or short circuit is detected, CHG and DSG FET are closed, PCHG FET is opened Essence Status (B0 ... B3) register reports short -circuit, short -circuit, overload (overload (overload current) and overcurrent details. The corresponding state (B0 ... B3) bit is set to 1, and the Xalert output changes the state. This condition is locked until the control (B0) is set and then reset. If you open the FET by reset control (B0) and the error conditions still exist in the system, the device will enter the protection response again.

Battery voltage

The battery voltage is converted to a single series component that allows the system host to measure the battery.

The voltage of the series components is converted to a GND -based voltage, which is equal to the voltage of the series component 0.15. This provides a range from 0 to 4.5 volts. The translation output is inversely proportional to the input.

Choose (B0 ... B1) Select a single series element. Battery selection (B2.B3) Select the measurement mode of series components. This allows each element in the string to determine the offset.

Calibration of the gain of battery voltage monitor amplifier

The battery voltage monitoring amplifier has a offset to calibrate to improve the accuracy.

The following steps illustrate how to measure and calculate the offset:

1. Set CAL2 0, CAL1 1, VM1 0, VM0 0 output voltage includes offset volume, vout1 0.975+ (1+k) × VOS (V)

formula, the k vcell ratio factor; VOS internal operational amplifier input end offset

2. Set CAL2 1, and set, set CAL2 1, CAL1 0, VM1 0, VM0 0 output voltage includes a proportional factor error and offset, use

vout2 0.975+(1+k) × Vos × 0.975 (V)

3. Calculation (vout1 -vout2) /0.975 result is the actual proportional factor Kact,

kact (vout1 -v output 2)/0.975 (0.975+ (1+k) × VOS ) - (0.975+ (1+k) × VOS -K × 0.975)/0.975 K x0.975/0.975 K

4. Calculate the actual offset value, where: VOS (ACT) (VOUT1 (VOUT1) - 0.975)/(1+Kact)

5. The calculation formula of the calibration battery voltage is: VCN VC (n+1) [0.975+ (1+Kact) × Vos (ACT) - Vcellout]/Kact

Cell balance control

The battery balance control allows to control the small discharge of any series of components. The purpose of this discharge is to achieve the same voltage in series components. The series resistance control discharge current value placed between the input pin and the nodes of the positive series.

Use unit selection (B4 ... B7) for single series component selection. If the BITS battery selection (B4 ... B7) is zero, the battery balance discharge is also disabled. When all unit selection (B4 ... B7) is set to 1, all series components are discharged.

DSG and CHG FET drivers control

If it violates the OC or SC security threshold, BQ29311 will drive the driver to close. Only when the BQ29311 integrated protection control permit is allowed, the hostIn order to force any FET to open or close. DSG and CHG FET driving meters to drain voltage are cut to 15 V (maximum) and 11 V (typical values).

The default state of the FET driver is closed. The host can control the FET driver by programming control (B1 ... B2). The B1 is used to control external discharge FET and B2 to control external charging FET. These controls are only valid when the stop is not activated.

PCHG field effect tube controller control

When the PCHG field effect transistor is used for battery owed, limited adjustment current mode, such as pre -charging and 0 volt charging. When starting the BQ29311 (connected to the battery pack), when VPACK is 3.8 V to 5.25 V, PCHG is cut to 3.5 V. Therefore, the actual VPACK voltage is determined by the PCHG clamp voltage and the VGS (grid pole voltage) of the external pre -charged FET. When VPACK is greater than 5.25V, the PCHG voltage is controlled at two -thirds of VPACK.

The default state of PCHG is on. There are two ways to pull PCHG to turn off the pre -charged FET. One is to control the register through serial communication. Set the B3 in the control register to 1 to turn off the pre -charged FET. Another method is to use CNTL. Floating CNTL or pulling CNTL to Vreg can turn off the pre -charged FET and CHG and DSG FET.

During the pre -charging operation, no over -current, overload and short -circuit detection. The external resistor that connects to the external pre -charged field effect is the current of the pre -charging operation in series.

Thermistor Driven Circuit

Titting can be used to drive Vreg thermistor. At 25 ° C, the typical thermistor resistance resistance is 10 k #8486; The default state is to close to save power. The maximum output impedance is 100 #8486;. TOUT (B6) enables or disables this function. TOUT (B6) enables or disables this function.

LED driver circuit

LED driver provides a current source from Vreg. LEDEN (B5) enables or disables this function.

Control input (CNTL)

The control input is pulled to VREG inside, which will disable all FET output. When the CNTL is pulled to GND, the BQ29311 controls output is controlled by security and register control logic. You can add an external pull to pull the upper voltage. This may cause an additional 100 μA leak to the GND through CNTL.

Clock input (clkin)

clock input allows to determine over current andWhen the short circuit is maintained, use the external basis to improve the accuracy of delayed time. The standard frequency is 32.768 kHz, but it must be higher than 30 kHz. The input is pulled up by the internal 100-k #8486; the resistor.

The conversion of the clkin tube foot prevents the internal oscillator. Therefore, if the external input stops oscillation, the internal oscillator will start and use all the timing functions.

Communication

I2C compatible serial communication provides read and write access to the BQ29311 data area. The data is clock through separate data and clocks (SCLK) pins. BQ29311 is used as a device without producing clock pulse. Communication with BQ29311 can be provided from the I2C support port of the GPIO foot or host system controller. The slave address of BQ29311 is 7 digits, with a value of 0100 000 (0x20).

BQ29311 is not compatible with the following functions that are compatible with i2C.

*BQ29311 is always regarded as a slave.

*BQ29311 does not support the universal code of the I2C specification, so it will not return to ACK, but return NACK.

* BQ29311 does not support automatic address increasing, allowing continuous reading and writing.

*BQ29311 allows writing or reading data at the same location without re -sending the location address.

The register determines the unit selection of voltage measurement and conversion unit selection , Unit balance and unit voltage monitoring mode.

Select B0 B1 (vm0 vm1)

These two bits select the series of union to measure the voltage measurement.

The unit selects B2 B3 (CAL0, CAL1): These bit determine the mode of the voltage monitor block.

Battery selection B3 B6 (battery 1 battery 4): These four bits choose a series of battery battery battery batteries. If the bit B4 ... B7 is set to zero (default value), the unit balance discharge is disabled; if the bit B4 ... B7 is set to 1, all units will discharge.

Cell1 1 bottom series elements

Cell2 1 Second low series elements

Cell3 1 Second high series element

Cell4 1 TOP series elements

Figure 2 showsTypical application of BQ29311 smart lithium -ion battery protector. Protecting the three or four series of lithium -ion batteries is not charged and discharged, and all functions required for short -circuit protection are included in a chip.

It is recommended to use R-C filters at the VCELL pin, where RVCell 100 #8486; (typical value) and CVCell 100 NF (typical values).

Unit connection order

The battery should be connected in the following order: the battery negative electrode is connected to VC5, the battery positive electrode is connected to VC1, the top battery is connected to VC4, the top of the second battery is connected to VC3, and the first The top of the three batteries is connected to VC2.

3 or 4 units configuration

FIG. 1 shows the configuration of the 4 series of units. In the 3 unit configuration, VC1 is short -circuited to VC2, and R3 and C13 are removed. VC2, VC3, VC4 and VC5 pins are used for three units.

Mechanical Data

PW (R-PDSO-G **) Plastic small shape packaging

Note: a. All linear size The units are all millimeters.

B. This drawing will not be notified separately if there is any change.

C. The main size does not include mold flying or protruding objects with no more than 0.15.

D. It belongs to Jedec Mo-153.