XC3S1000-4FGG456C: FPGA - Field Programmable Gate Array. Company advantage inventory.

introduce

Spartan®-3 Series Field Programmable Gate Arrays

Designed for high volume needs,

Cost-sensitive consumer electronics applications. of

Densities for families of eight range from 50,000 to

5,000,000 system gates, as shown in Table 1.

The Spartan-3 family builds on early success

Spartan-IIE series by increasing the amount of logic

resources, the capacity of the internal RAM,

I/O, overall performance levels and

Improve clock management function. numerous

Enhancements from the Virtex®-II Platform

technology. These Spartan-3 FPGA Enhancements

Combined with advanced process technology, it provides more

More features and bandwidth per dollar than before

Possibly, setting new standards in programmable logic

industry.

Due to its low price, Spartan-3 FPGAs

Ideal for a wide range of consumer electronics

applications, including broadband access, home

Network, Display/Projection and Digital TV

equipment.

The Spartan-3 range is an alternative to face masks

programmed ASIC. FPGAs avoid high initial costs,

Long development cycles and inherent flexibility

Regular ASIC. Additionally, FPGA programmability allows

Field design upgrades without hardware replacement

Necessary, not possible with ASIC.

feature

?Low-cost, high-performance logic solutions for high volume,

consumer-facing applications

? Densities up to 74,880 logic cells

?SelectIO? interface signaling

?Up to 633 I/O pins

? 622+ Mb/s data transfer rate per I/O

?18 single-ended signal standards

?8 Differential I/O Standards including LVDS, RSDS

? Terminated by digitally controlled impedance

?Signal swing from 1.14V to 3.465V

? Double Data Rate (DDR) support

?DDR, DDR2 SDRAM supports up to 333 Mb/s

?Logical resources

?Rich logic unit with shift register function

? Wide and fast multiplexer

?Fast carry-ahead logic

? Dedicated 18 x 18 multiplier

? JTAG logic compatible with IEEE 1149.1/1532

?SelectRAM? Hierarchical memory

? Up to 1,872 Kbits of total block RAM

? Up to 520 Kbit of total distributed RAM

?Digital Clock Manager (up to four DCMs)

? Eliminate clock skew

?Frequency synthesis

?High Resolution Phase Shift

?8 global clock lines and rich routing

? Xilinx ISE? and WebPACK? software fully supported

development system

?MicroBlaze? and PicoBlaze? Processor PCI?,

PCIExpress® PIPE endpoints and other IP cores

? Lead-free packaging options

?Car Spartan-3 XA series variant