LTC1705 dual 550k...

  • 2022-09-16 16:00:09

LTC1705 dual 550kHz synchronous switch regulator controller 5 -digit VID and 150MA LDO (2)

The smallest/maximum comparison device

Two additional feedback circuits can monitor the main circuit feedback amplifier and step. The biggest comparator (see square frame) Activate more than 800mV when FB rises more than 5%. It immediately turns to the top MOSFET (QT) close and opens the bottom MOSFET (QB), and keeps them until FB falls to 5%of its nominal value. This is as fast as possible to reduce the output and prevent (usually expensive) goods damage. If FB rises because the output is short -circuited to the higher power supply, QB will keep connecting until the short circuit disappear, and the higher power current limit or QB dies to save loads. This behavior provides a maximum of over -voltage failure at the output terminal, while allowing the circuit to restore normal operation when the fault is eliminated.

If the FB is more than 5%below 800mV, and immediately force the duty cycle to be switched to 90%to restore the output voltage into the range. When FB releases within 5%. When a soft startup or current restriction circuit, the MIN is banned only that the output should be activated twice and legally below its regulatory value. Note that the FB tube foot is a feedback amplifier. The typical compensation network does not include local DC feedback around the amplifier, so the DC level at the FB will be the accurate replication voltage of the output, except R1 and RB (Figure 3). However, compensation capacitors will make the AC signal attenuation at FB, especially low bandwidth 1 feedback circuits. This will cause the minimum value, maximum value and maximum value comparison to respond to the output voltage immediately, if they monitor the output of FB. Use VID code to transform rapidly, and this problem is even more serious.

In order to overcome this problem, the second resistor division (see the square diagram) was used to provide a comparator with accurate replication of the minimum, maximum and best output voltage. This ensures the rapid reaction of the comparator to the code. For the I/O channel, the output voltage has nothing to do with the VID code, so the change of VOUT is minimized. The maximum I/O feedback ring bandwidth will minimize these latency as much as possible, allowing the minimum value and maximum value to run. See the feedback circuit/compensation section.

pgood logo

LTC1705 contains a good pins (PGOOD). PGOOD is a leakage output and requires an external pull -up resistor. If these three regulators are usually ± 10%of the nominal value, the transistor MPG is turned off (see the square diagram) and PGOOD is pulled up by the external pull -up resistor. If any of the three outputs is greater than more than 4 μs, it exceeds 10%of the nominal value and PGOOD is lower, indicating that the output exceeds the regulating range. To raise, all three outputs must be in a adjustable state for more than 20 μs. PGOOD still maintains active startup and current restrictions in the soft process. When power is powered, PGOOD is lowered. Once the RUN/SS pin rises above the stop threshold, the three -pair of good power comparats will take overControl the transistor MPG. 4 μs and 20μs delay ensure short output transient failure, that is, successfully grab by the power factor comparator, do not cause a brief failure at the PGOOD pin. For the core channel, if there is a VID code change, the internal DAC responds to immediately by switching its output voltage. However, the switching power output conversion rate is limited by the output filter. If the VID code step changes very small, the good power comparator may not register for any conversion. In order to confirm the code transmission command, the LTC1705 forced PGOOD was pulled down to the change of the VID code, and it was 20 μs. After that, the time interval, good power comparator determines the correct state of the program.

停机/软启动

RUN/SS引脚执行两个功能:如果拉到接地,它关闭LTC1705并充当传统软启动引脚,强制最大负载循环限制与运行/ The voltage when SS is proportional. An internal 3 μA current source is pulled to the Run/SS pin, allowing a soft starting slope to have only one external capacitor ground. Even if the LTC1705 is closed, the source is also in a state of activity, ensuring that any external pull -down is released in RUN/SS. During the shutdown, the LTC1705 enters the micro -power sleep mode and the static current is usually less than 50 μA.

If the LTC1705 is lower than this value, the RUN/SS pin will turn off the LTC17050.5V (Figure 4). After waking up between 0.5V and about 1V, the LTC1705 remained at the minimum value. As a potential increase in the/ss, the duty cycle increases linearly between 1V and 2V, reaching 90%of the final value as RUN/SS higher than 2V, somewhere before this point, the feedback amplifier will be The ring and the output will be adjusted. When RUN/SS rises to 1V below the VCC, the LTC1705 enables the minimum feedback comparator has been fully put into operation.

current limit

LTC1705 includes a board -load current restricted circuit restricting user programming maximum output current level. It works by sensing the voltage on QB to work in the process of QB and compare the voltage. During the voltage, the user programming voltage under IMAX. Because QB looks like a low -value resistor, when it connects, the cross -section of the voltage drops is proportional to the current flowing through it. In a buck converter, the average current of the inductance is equal to the output current. This current also flows over QB when it is on time. Therefore, the output current can be monitored by observing the LTC1705. At any time QB is turned on, and the current flowing to the output is quite large. The SW node at the QB drainage port will be a bit negative. The LTC1705 -type induction to this voltage is converted and compared with the voltage of the voltage IMAX pins. The IMAX pin includes 10 μA pulled after trimming, allowing the user to set it in IMAX and a resistance Rimax on -site voltage. The LTC1705 compares two inputs and starts to limit the voltage at the SW pins when the output current is negative than the voltage at the IMAX. When the load current suddenly increases, the voltage feedback circuit forces the duty cycle to increase the connection time quickly. RDS (open) QB must be low enough to ensure that the SW node is pulled down within the QB connection time to obtain appropriate current sensing.

Flow limit detector is connected to the internal GM

The amplifier pulls the current from the RUN/SS pin, and the SW and IMAX pins. The maximum value of this current is 250 μA (usually). It began to release soft startup capacitors to run/ss, reduce the duty occupation ratio and control the output voltage until the current drops to the limit. Soft startup capacitors need to move a certain amount before it has any impact on the duty cycle, add a delay until the current limit is effective (Figure 4). This allows LTC1705 to experience a short -term overload without affecting the output voltage adjustment. The delay is also used as the pole in the current limit to enhance the stability of the circuit. When the soft startup capacitor is discharged, the top MOSFET must be able to withstand high power differences due to high current, especially if the regulator is powered by a large current. The larger overload will cause the soft startup capacitor to drop quickly and protect the output component damage. The current limit GM amplifier includes a clip to prevent it from pulling/SS to be lower than 0.5V and turn off the LTC1705. The power MOSFET RDS (on) is different from MOSFET, limiting the accuracy limit ring obtained from the LTC1705 current. In addition, because parasites will increase at current, causing the circle to start ahead of time. The LTC1705 current limitation is mainly to prevent disasters. The no explosion circuit cannot be used as a precision current regulator. It should usually be set to about 50%higher than the maximum value of about 50%to prevent the normal output current of the component from allowing the invasion of the normal current range. See the current restricted programming section to obtain a valve for RIMAX.

Outside component selection

Power gold oxygen semi -electrocarmoid

The highest efficiency depends on the external MOSFET used from LTC1705. LTC1705 requires at least two external MOSFETs on each side, if one or more MOSFETs are connected parallel to reduce the resistance. In order to work effectively, these MOSFETs must show the low RDS (open) at 5V VGS to minimize the resistance power loss when they transmit current. They must also have low grille charges to minimize transitional loss and switching. On the other hand, in the typical LTC1705 circuit, the voltage breakdown requirements are quite mild: 6V's maximum input voltage limits the safety level of most devices for VDS and VG of MOSFET.

Low RDS (open)

RDS (on) calculation is very simple. RDS (Kai) is from the drain to the sourceWhen the resistor is completely opened. Many MOSFETs specify RDS (open) when the 4.5V gate is driven, which is the correct number supply used in the 5V voltage operation of the LTC1705 circuit. When the current flows through this resistor, the MOSFET is opened, and it generates 12 watts of heat. Here is the I current flow (usually equal to the output current) and the RMOSFET RDS (open). Only when the MOSFET is opened. When it is closed, the current is zero, and the power loss is zero (another MOSFET is busy losing power). The loss of energy has two functions: it is not good from output power, cost efficiency, and make MOSFET hotter. As a result, the current in the MOSFET has a maximum power loss. Reduce RDS (ON) to sacrifice additional door fees (usually) and more costs (usually). Correctly select MOSFET RDS (on) to become a weighing efficiency loss, power consumption and cost. Please note that although the power loss has a significant impact, in terms of system efficiency, in a typical LTC1705 circuit, the MOSFET with a small and surface -free sheet is allowed to be installed on the surface.

Door charge

The door charge is the charge volume (essentially (electrical) LTC1705 needs to be put in a gate to open it. The easiest way to imagine the grid charge as a capacitor MOSFET to SW (for QT) or connected to PGND (for QT problem B). This capacitor consists of the MOSFET channel for charge. A single capacitance of the source. No matter what the charges are, there is still all the facts that must be out of the PVCC to open the MOSFET door as MOSFET. Heating them. More powerful power is lost! In this case, energy will lose the block of each switch per cycle in a small -sized block, and the size of the block is charged through the grid of the MOSFET. Each time the MOSFET switch is , Another loss. Obviously, when the clock is running, the more important door charge becomes a loss period. The old -fashioned switch running at 20KHz can almost ignore the door fee as the loss item; at 550kHz LTC1705, the grid charge loss may be very large. Efficiency punishment. Gallery charging loss may be the main reason for the loss item under medium load current, especially in Mos Fitz. The grid charge loss is also the power consumption of the LTC1705 itself.

TG charge pump

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[ 123] There is another slightly different MOSFET drive, LTC1705 needs to move around. The LTC1705 design is designed for N -channel MOSFET for QT and QB, mainly because the N -channel MOSFET is usually low in cost and is more than a similar P groove. The RDS (ON) of Dao MOSFET is lower.Turning QB On is simple, because the source of QB is attached to PGND; the LTC1705 is only in PGND and PVCC. Opening Qt is another matter. Source QT is connected to SW, when QT is opened. In order to keep the QT opening, the LTC1705 must install the VGS above TG-One MOSFETPVCC. It is connected to the switch (the source of Qt) on the switch by using the negative electrode attraction of the floating drive. When the external 1 μF capacitor (CCP) is connected to SW and Boost (Figure 2) when the SW is very high, it can be charged by itself when the SW is low. This simple charged pump can keep the TG driver that can still maintain vitality PVCC even if it is far higher than its swing. The value of the guidance capacitor is at least 100 times the upper MOSFET capacitance of the total effective door. For a very large external MOSFET (or multiple MOSFET parallel), CCP may need to increase by more than 1 μF.

Input power supply

Allows LTC1705, including large MOSFET drives on the chip, also limited the maximum value input voltage to 6V. This limits the actual maximum value of the 5V guide to the loosening adjustment. The LTC1705 type works normally when the input power is reduced to about 3.3V. Therefore, if you choose the appropriate MOSFET (see the power MOSFETS part). At the same time, the input power supply needs to provide several non -large voltage drops. The input supply must have sufficient adjustment to prevent sudden load changes and cause the LTC1705 input voltage to dive. In the typical application of the secondary low -voltage logic power supply of LTC1705, all these inputs enhance the input bypass container when the main system logic power supply meets the conditions.

Enter the bypass electrical container

The typical LTC1705 circuit is powered by 5V logic power supply at 15A, and its core output voltage may be 1.6V. 5V to 1.6V means that the duty ratio is 32%, which means that QTC is 32%per switching cycle. During the normal operation of QTC, the current from the input current is equal to the rest of the load current in the circulation, and the current led from the input terminal is close to zero. This 0A to 15A, 32%of the duty -ratio pulse string plus 7 arms at the input end. At 550kHz, the switching cycle lasted about 1.8 μs -most system logic power supply could not adjust the output current at this speed. Local input requires bypass capacitors to make up for this difference to prevent the input power from starting QTC. This capacitor is usually selected as a valid value ripple current capacity and ESR and value. This LTC1705 I/O channel usually runs output current at a smaller speed, so the selection of the LTC1705 circuit is mainly to meet the core output requirements. Take our 15A as an example. There are three ways to enter bypass capacitors: blood sink must be low enough to keep the initial decline of QT in a reasonable range (about 100mv); The capacity of its average roots must be sufficient to withstand the 7 -arm ripple current input and capacitance to maintain the input voltage until the input power supply can be supplemented. Generally speaking, the capacitors of the two parameters of the capacitor will be far greater than the need to keep the capacitance -based drooping under control. In our example, we need 0.006 u0026#8486; ESR to keep the input voltage below 100mV, the current level jumps to 15A, and the number of ripples that avoids overheating capacitors in the arm. Multiple low ESRs can meet these requirements 钽 or electrolytic capacitors parallel or with large single -piece ceramic capacitors.

The input capacitor as the LTC1705 application is a very popular choice, but they deserve a special choice to note here. If an ordinary electric container is affected by a large amount of square root value, it has a destructive failure mechanism current (such as the current at the LTC1705 input terminal). At a random time after opening, they may explode for no reason. Capacitor manufacturers realize this and sell special wave rushing tests . When selecting 容 Input capacitors, make sure that its rated value can be drawn by LTC1705. If the data table does not give a valid value current rated value, the capacitor may not have a rush test.

Output bypass electrical container

The output bypass electrical container has very different requirements from the input capacitor. The output of the antihypertensive regulator like the LTC1705 is much lower at the input terminal, because the inductor current is continuously flowing at the output end. The main concern is the output as a capacitor ESR. The fast load current conversion is displayed at the output end as the output bypass power container until the feedback circuit LTC1705 can change the electric sensor current to match the new load current value. The ESR step at the output is usually calculated by the largest budget project in the load regulation. For example, we assume 1.6V, 15A with 0.006 u0026#8486; ESR output capacitor switches under 0A to 15A load, and go through the output of 90mV-5.6%output change at the output end! Usually the solution is output. For example, keep a transient response

We need an output ESR better than 0.004 u0026#8486; This can meet 6 0.025 u0026#8486; and 180 μF parallel parallel to special polymer capacitors.

Electrochemical

The inductors in the typical LTC1705 circuit are mainly used for value and saturated current. The electrocatator value sets the ripple current, and is usually selected between 20%to 40%of the expected full load current. Robber current setting method:

In our 1.6V, 15A example, we set the ripple to 15A or 3A, and the inductor value is:

Electrochemicals must not be saturated at the expected peak value. In this case, if the current limit is set to 22.5A, the rated value of the inductor shouldCan withstand 22.5A+(0.5 u0026#8226; Iripple) or 24A saturation

Feedback circuit/compensation

Feedback circuit type

In a typical LTC1705 circuit, the feedback circuit Including the modulation, the external sensor, the output capacitor feedback amplifier and its compensation network. All these components will affect circular behavior and must occupy loop compensation. The modulator includes internal PWM generators, output MOSFET drives and external MOSFET itself. From the perspective of the feedback loop, it looks like the transmission function of linear voltage from com to SW, roughly a gain equal to the input voltage. It has a good communication behavior in the typical circuit compensation frequency at half of the switch frequency. The combination of external inductors/output capacitors makes more important contributions to cycle behavior. These components cause a second -order LC rolling at the output end, accompanied by 180 ° phase shift. What is this filtering PWM waveform, which obtains the required DC output voltage, but the phase shift complicates the circuit if the frequency is in the magnetic pole. In the end (usually higher than the LC frequency), the electric resistance of the output capacitor will be close to its ESR and the capacitor will stop, leaving 6DB/times frequency range and 90 ° phase shift (Figure 5).

So far, the communication response of the circuit has exceeded user control well. The modulation is designed and external L and C are usually selected according to the requirements of adjustment and load current, and the communication circuit response is not considered. On the other hand, the feedback amplifier gives us a control to adjust the communication response. Our goal is to move 180 ° (so regulatory circuit adjustment) and some things smaller than 360 ° under -current under DC electricity. The simplest strategy is to feedback the amplifier as the inverter integror, with a frequency of 0 decibels lower than LC pole (Figure 6). This type 1 structure is stable, but the transient response is less than that if the LC is in the low frequency, it is abnormal. Figure 7 shows an improved type 2 circuit, which uses the additional pole zero -pair of additional pole -zero -pairs of removing 90 °. This allows the circuit to maintain more phase shifts of the LC part at 90 °, and provide a loop in the center of the phase BUMP to reach the 0db gain 2 circuit. , Limit the overall phase shift caused by LC. The compensation in the additional phase of the feedback amplifier allows 0DB to point to the LC frequency or more, and the improvement of the loop bandwidth basically exceeds the simple type 1 ring. It compensate the LC combination capacity and low capacitor ESR to keep the phase shift at the frequency range of the extension near 180 °. The LTC1705 circuit uses traditional switching -class electrolytic output capacitors in type 2 and can usually get acceptable phase margin compensation.

Type 3 loop (Figure 8) uses two poles and two zero zero to obtain 180 ° phase improvement in the middle of the frequency. Correctly designed type 3 circuitIt can maintain acceptable loop stability. Even when the low -output capacitance, the ESR segment moves nearly 180 ° and moves far higher than the initial letter of credit. Like the type 2 circuit, the cycle should be maximized in phase bumps. Many LTC1705 uses a low ESR 钽 or OS-Con output capacitor circuit requires type 3 compensation to obtain acceptable phase with high bandwidth feedback circuits.

Select the feedback element

is a typical type 2 or type 3 selection R and C value cycle is a very important task. The application data table displayed in this article shows typical values u200bu200band optimizes display components for power. They should be able to provide acceptable performance under similar power components, but there may also be deviations if they have changed significantly even a major power component. Applications that need to optimize the transient response need to re -calculate the compensation value, especially for problems with problems. The potential mathematics is complicated, but the ingredient value can be able to reduce the gain and phase of the device under the cross frequency. The gain and phase of the modulator can be known directly from if it is appropriate, it can simulate the parasitic value of a test board. Measurement will give you more accurate results, but simulation can usually get enough results to give a working system. Measuring the gain of the modulator directly phase, connect a test board and actual MOSFET with LTC1705, the inductance and input and output capacitors that will be used in the final design will be used. This test board should adopt an appropriate construction technology speed simulation circuit: bypass capacitors are located near the nearby LTC1705, there is no long wire of connecting parts, an appropriate size grounding circuit and other connection feedback amplifiers are used as a simple type 1 circuit, with a 10K resistance VOUT VOUT VOUT VOUT VOUT Go to FB and 0.1 μF feedback capacitors. Select the bias resistor (RB) as needed to set the expected output voltage. Break the RB from the ground to connect it to the signal generator or a network analyzer (Figure 9) to inject the test signal into the cycle. Measure the output node capacitor from the compensation pin to the output. Make sure that the input of the analyzer is a DC voltage of AC coupling in the compressor and the output end. The nodes will not damage the measurement value or damage the analyzer.

If the test board measurement is not practical, the simulation can be used to generate approximate gain/phase curve. Insert the expected capacitors, induction, and MOSFET values u200bu200binto the SPICE Deck below, and generate an AC diagram of V (Vout)/V (Comp). The unit is DB and the phase is based on the degree. For details, see how your Spice manual generates this picture.

With the gain/phase diagram, you can select the cross frequency of the loop. Usually the curve looks a bit like it is shown in Figure 5. Select the flat part of the cross frequency or phase curve when the rise, which is beyond the external LC pole. The frequency is usually working smoothly between 10kHz and 50kHz. Record gain (gain, unit: DB) andPhase (phase, at this point. The expected feedback amplifier gain will be-Gain will make the ring gain at 0db. Now calculate the required phase voltage, assuming that 60 ° is the target phase of the phase of the phase 30 °) If the required pressure is less than 60 °, the type 2 circuit can be successfully used, saving two external components. The supercharged value greater than 60 ° usually requires the type 3 cycle to obtain satisfactory performance.

] Finally, select a convenient resistance value for R1 (10K is usually high value). Calculate the remaining value now: (K is the constant used in calculation)

f u003d The cross frequency of selected

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[ 123] G u003d 10 (gain/20) (this transforms gain (unit: DB) to G IN absolute gain)

Flowing programming

The programming current limit on the LTC1705 is directly forward. The IMAX pin can be dropped by the maximum allowable voltage through the QB (bottom). Current, and output current. The inverter of the heetc1705 flow circuit is turned on the voltage of the negative voltage IMAX before comparing QB. The positive voltage is allowed. To set the current limit, please calculate the expected voltage at maximum expected current through QB voltage: VPROG: VPROG: VPROG u003d (ILIMIT) (RDS (on)) Ilimit should choose to work more than expected, allow MOSFET RDS (open) to change with temperature. Set ilimit to maximum normal working current is often safe to protect the power component (if.) Please note that the ringtone on the switch node may cause the current limit threshold error. This factor will be changed according to the different layout and component. Then use the internal 10μA pull -down and external resistor: RIMAX u003d VPROG/10 μA should be on the actual circuit on the actual circuit To ensure that the current circuit is expected. The MOSFET RDS (ON) specifications are like the rated value of Himeli cars. It should be carefully checked with salt. A large part of the values u200bu200bof the entire Vprog. If the VPROG settings are too low, the LTC1705 may not be able to start up.