THCV231: SerDes transmitter and receiver with bidirectional transceiver. Company advantage inventory.

General Instructions

THCV231 and THCV236 are designed for

Support video data transmission between host and host

show.

THCV231

A high-speed channel can transfer up to 14 bits of data on one channel

Pixel clock frequency from 12MHz to 160MHz.

THCV236

A high-speed channel can carry up to 32 bits of data,

3-bit sync signal on pixel clock

By converting the frequency from 6MHz to 160MHz

RGB444 to YCbCr422.

The chipset has a high-speed data channel,

Video data up to 1080p/60Hz can be transmitted.

The maximum serial data rate is 4.00Gbps/lane.

feature

?Data width optional

?Wide frequency range

? AC coupling for high-speed lanes

?CDR does not require external frequency reference

?Wide supply voltage range from 1.7V to 3.6V

?Other spread spectrum on the data stream

?2-wire serial interface bridge function (400kbps)

?Remote GPIO control and monitoring

?THCV231

QFN32 (5mm x 5mm) with exposed pad

THCV236

QFN64 (9mm x 9mm), exposed pad to ground

? Compliant with EU RoHS

Functional Overview

With high-speed CML SerDes, proprietary coding scheme and CDR (clock and data recovery) architecture,

THCV231 and THCV236 can transmit 14-bit data over Main-Link over a single differential pair cable

Minimal external components. Additionally, THCV231 and THCV236 have sub-links for bidirectional

Transmits 2-wire serial interface signals, GPIO signals, and HTPDN/LOCKN signals for

The primary link is through another pair of 1 pair CML lines. It does not require any external frequency reference such as

crystal oscillator. The THCV231-THCV236 system is able to monitor peripherals and control them by

2-wire serial interface or GPIO. They can also report input by GPIO and

internal state.

Function Description

Internal reference output/input functions (CAPOUT, CAPINA, CAPINP)

An internal regulator generates 1.2V (CAPOUT). This 1.2V linear regulator cannot provide any other external power

load. Bypass CAPOUT to GND with 10uF.

CAPINP (THCV231 only) provides the reference voltage for the internal PLL, while CAPINA provides the reference voltage

for any internal analog circuits. Bypass CAPINP/CAPINA to GND with a 0.1uF capacitor to eliminate high frequency noise.

CAPOUT, CAPINA and CAPINP must be tied together.

The power supply AVDD should be stabilized by decoupling capacitors and a series noise filter (e.g.,

ferrite beads).

THCV217

THCV218

THCV226

THCV216

THCV234

THCV220

THCV219

THCV236

THCV235

THCV231