5962-89807012A: Regulator/Demodulator. Company advantage inventory.

feature

Recover signal from 100 dB noise

2 MHz channel bandwidth

45 V/µs slew rate

Low crosstalk: ~120 dB at 1 kHz, ~100 dB at 10 kHz

Pin Programmable, ±1 and ±2 Closed-Loop Gains

0.05% closed loop gain accuracy and matching

100 μV Channel Offset Voltage (AD630)

350 kHz full power bandwidth

Available chips

Application field

Balanced modulation and demodulation

Sync detection

Phase detection

Orthogonal detection

Phase sensitive detection

Lock zoom

Square wave multiplication

Functional block diagram

figure 1.

General Instructions

AD630 is a high precision balanced modulator/demodulator

Combine the flexible commutation architecture with

Trimmed laser wafers provide accuracy and temperature stability

Thin film resistors. On-Board Application Resistor Network

Provides ±1 and ±2 precision closed-loop gains of 0.05%

Accuracy (AD630B). These resistors can also be used to precisely

Configure a multiplexer gain of 1, 2, 3, or 4. external feedback

Implement high gain or complex switching feedback topologies.

The AD630 can be thought of as a precision op amp with two functions

Separate differential input stage and a precision comparator

Front end for selecting activities. quick response

The comparator time plus high slew rate and fast

The stabilization of the linear amplifier minimizes switching distortion.

AD630 for precision signal processing and instrumentation

Applications requiring a wide dynamic range. when

Used as a synchronous demodulator in a lock-in amplifier

configuration, the AD630 can recover small signals from 100 dB

Interference noise (see lock-in amplifier application)

part). Although optimized for operation up to 1 kHz,

Circuits are useful at frequencies up to several hundred kilohertz.

Additional features of the AD630 include pin programmable frequency

compensation; optional input bias current compensation resistor,

common-mode and differential offset voltage adjustment, and

Channel status output indicating which of the two differential

Input is valid.

Product Highlights

1. The application flexibility of AD630 makes it the best choice

choice for applications requiring precise fixed gain,

Switching Gain, Multiplexing, Integrating Switching

function, and high-speed precision amplification.

2. The 100 dB dynamic range of the AD630 exceeds

any hybrid or IC-balanced modulator/demodulator, and

Comparable to expensive signal processing instruments.

3. The op amp format of the AD630 can be easily implemented

High gain or complex switching feedback functions. of

Application resistors help in most applications

Universal app without any other parts.

4. AD630 can be used as 2-channel multiplexer with gain

1, 2, 3 or 4. 100 dB channel spacing at 10 kHz

Approaching the limit of what is achievable with an empty IC package.

5. Laser trimming of comparators and amplifier channels

In most cases, the offset eliminates the need for external zeroing.

theory of operation

Two Ways to Find the AD630

Functional block diagram of AD630 (see Figure 1)

Pin connections showing internal functions. One

Another architecture diagram is shown in Figure 20.

Figure, single A and B channel preamp, switch,

Combined with the integrator output amplifier in a single op amp

Amplifier This amplifier has only two differential input channels

Active once.

How the AD630 Works

The basic mode of operation of the AD630 may be easier to implement

identified as two fixed gain stages that can be plugged into

Signal path under control of a sensitive voltage comparator.

When the circuit switches between inverting and non-inverting

gain, which provides basic modulation/demodulation functions.

The AD630 is unique in that it includes trimmed laser wafers

Thin-film feedback resistors on a monolithic chip. of

The configuration shown in Figure 21 produces a gain of ±2 and can

This can easily be changed to ±1 by moving RB away from its ground

to the output.

Comparator selects one of two input stages to complete

Operational feedback connections around the AD630. of

Deselected input is closed with negligible effect on operation

When Channel B is selected, the RA and RF resistances are

Connected for inverting feedback as indicated by inverting gain

The configuration diagram is shown in Figure 22. The amplifier has sufficient

Loop Gain to Minimize RB Loading Effects at Dummy Loads

Ground generated by the feedback connection. when signs

Comparator input inverted, input B deselected, input A

chosen. The new equivalent circuit is the non-inverting gain

The configuration is shown in Figure 23. In this case, RA appears

across the op amp input terminals, but because the amplifier

Driving this differential voltage to zero, the closed-loop gain is

Not affected.

When RF/RA = the two closed-loop gains are equal in magnitude

1 + RF / RB, this is due to making RA equal to RFRB / (RF +

RB) The parallel equivalent resistance of RF and RB.

5kΩ resistor and two 10kΩ resistors on AD630 chip

Used to obtain a gain of 2, as shown in Figure 22 and Figure 23.

Make RF equal to 5kΩ by connecting a 10kΩ resistor in parallel,

By omitting RB, the circuit can be programmed for a gain of ±1 (because

as shown in Figure 28). These and other configurations use

On-chip resistor provides 2.5kΩ for inverting input

source impedance. A more complete AD630 diagram showing

A 2.5kΩ resistor can be used on the non-inverting input

Conveniently used to minimize errors caused by typing

bias current.

Circuit Description

A simplified schematic of the AD630 is shown in Figure 24.

has been subdivided into three main parts, the comparators,

Two input stages and an output integrator. Comparators

Consists of a front end consisting of Q52 and Q53, a flip-flop load

Consists of Q3 and Q4 and two current-controlled switching units

Q28, Q29 and Q30, Q31. This structure is designed to

Differential input voltage with amplitude greater than 1.5 mV

One of the full selections applied to the comparator input

exchange unit. The sign of this input voltage determines which

Select one of the two switch units.

The collector of each switching cell is connected to the input

Transconductance stage. Selected cell delivers bias current

The i22 and i23 go into the input stage they control, making it

active. Deselecting a cell prevents biasing its input stage,

As a result, it remains closed.

The structure of the transconductance stage is like this

exhibits high impedance at its input terminals and is not shown

Bias current when deselected. Deselected input does not

interfere with the operation of the selected input, ensuring that

Maximum channel spacing.

Another feature of the input structure is that it enhances

The slew rate of the circuit. Active phase current output

The quasi-hyperbolic sine relation that follows the differential

Input voltage. This means that the larger the input voltage, the

The harder and faster this stage is to drive the output integrator

The output signal moves. This feature helps ensure fast, symmetrical

Set up when switching between inverting and non-inverting

Closed loop configuration.

The output section of the AD630 includes a current mirror load

(Q24 and Q25), the integrator voltage gain stage (Q32) and a

Complementary output buffers (Q44 and Q74). output

Both transconductance stages are connected in parallel to

Current mirror. Because the deselected input stage does not generate

source current and present high impedance at its output

No conflict. Current mirror switchable differential

Active input transconductance output current

The amplifier is converted to single-ended form for the output integrator.

Complementary output drivers then buffer the integrator

output to produce a low impedance output.