MAX186BEWP: Analog-to-Digital Converter. Company advantage inventory.

describe:

MAX186/MAX188 are 12-bit data acquisition systems

Combined with 8-channel multiplexer, high bandwidth

track/hold, serial interface and

High conversion speed and ultra-low power consumption.

The device operates from a single +5V supply or

Dual ±5V power supplies. Analog inputs are software configurable

For unipolar/bipolar and single-ended/differential

operate.

4-wire serial interface connects directly to SPI,

QSPI™ and MICROWIRE™ devices without external

logic. Serial strobe output allows direct connection to

TMS320 series digital signal processors. of

MAX186/MAX188 use the internal clock or

External serial interface clock to perform successive approximation

A/D conversion. serial port can

When using the internal clock, its operating frequency exceeds 4MHz.

The MAX186 has an internal 4.096V reference, while

The MAX188 requires an external reference. Both parts have

Reference buffer amplifier for simplified gain adjustment.

The MAX186/MAX188 provide a hardwired SHDN pin

and two software-selectable power-down modes.

Accessing the serial interface automatically powers up

device, and fast turn-on times allow

The MAX186/MAX188 should be turned off between conversions.

Use this power-down technique

Between transitions, the supply current can be reduced to

Below 10µA at reduced sampling rate.

The MAX186/MAX188 offer 20-pin PDIP and

SO bags, as well as shrunken small silhouette bags

(SSOP), which has 30% less area than 8 pins

PDIP. For applications that require a parallel interface,

See the MAX180/MAX181 data sheet. antialiasing

filter, see the MAX274/MAX275 data sheet.

Features:

8-channel single-ended or 4-channel

Differential input

?Single +5V or ±5V operation

? Low power consumption: 1.5mA (working mode)

2μA (power-down mode)

?Internal sample/hold, 133kHz sample rate

? Internal 4.096V reference (MAX186)

?Compatible with SPI/QSPI/MICROWIRE/TMS320

4-wire serial interface

? Software configurable unipolar or bipolar input

?20-pin PDIP, SO, SSOP packages

? Evaluation kit available

application:

Portable Data Logging

data collection

High-precision process control

automatic testing

robot technology

battery powered instrument

Medical equipment

MAX186/MAX188 use successive approximation

Conversion techniques and input sample/hold (T/H) circuits

Convert analog signal to 12-bit digital output.

Flexible serial interface provides easy interfacing

microprocessor. No external hold capacitors

need. Figure 3 shows

MAX186/MAX188

Pseudo differential input

Sampling Architecture of ADC Analog Comparator

Described in the equivalent input circuit

(Figure 4). In single-ended mode, IN+ is internally

Switch to CH0-CH7, IN- switch to AGND. exist

Differential mode, IN+ and IN- select from pair

CH0/CH1, CH2/CH3, CH4/CH5 and CH6/CH7

Use Table 3 and Table 4 to configure the channel.

In differential mode, IN- and IN+ are switched internally

to any analog input. This configuration is

The effect of pseudo-differentiation is that only the signal is

Sample IN+. The return side (IN-) must remain stable

Within ±0.5LSB (Best results are ±0.1LSB)

Relative to AGND during conversion. complete this

By connecting a 0.1pF capacitor from AIN- (selected

analog input).

During the acquisition interval, the channel selection is

The positive input (IN+) charges the capacitor CHOLD. of

The acquisition interval spans three SCLK cycles and ends

Falling edge of SCLK after input of last bit

Control word entered. when the acquisition closes

Interval, T/H switch on, keep charge

on CHOLD as a signal sample at IN+.

The conversion interval starts at the input multiplexer

Switch CHOLD from positive input (IN+) to

Negative input (IN-). In single-ended mode, IN- is only

AGND. this will be in

Comparators. Capacitive DAC in

Convert the rest of the cycle to restore the node

0V is zero in the range of 12-bit resolution. this

The action is equivalent to transferring a charge of 16pF x

[(VIN+)-(VIN-)] CHOLD to BINARY WEIGHTED

capacitive DAC, which in turn forms a digital representation

analog input signal.

track/hold

T/H enters its tracking mode on falling clock

The edge after the fifth bit of the 8-bit control word

Move in. T/H enters its hold mode when falling

Clock edge after the eighth bit of the control word

Moved in. If the converter is set to

single-ended input, IN- is connected to AGND, and

The converter samples the "+" input. If the converter is

Set differential input, IN- connect to "-"

input, and the difference between |IN+-IN-| is sampled. exist

At the end of the conversion, the positive input is connected

Back to IN+, CHOLD charges to the input signal.

T/H the time required to acquire the input signal

is a function of how fast its input capacitance is

charged. If the source impedance of the input signal is high,

Acquisition time is extended, more time must be spent

Between conversions are allowed. Calculate acquisition time

pass:

tAZ = 9 x (RS + RIN) x 16pF,

where RIN = 5kΩ and RS = the source impedance of the sensor

input signal, and tAZ is always not less than 1.5μs. Notice

Power supply impedance below 5kΩ is not noticeable

affects the AC performance of the ADC. higher source

Impedance can be used if an input capacitor is connected

Connect to the analog input as shown in Figure 5. Notice

The input capacitor forms an RC filter with the input

source impedance, which limits the signal bandwidth of the ADC.

input bandwidth

ADC's input tracking circuit has 4.5MHz

Small signal bandwidth so can be digitized

High-speed transient events and measure periodic signals

The bandwidth exceeds the sampling of the ADC

Scoring by using undersampling techniques. avoid

High frequency signal aliasing into frequency

For frequency bands of interest, anti-aliasing filtering is recommended.