GD25Q16CSIG

3.3V Unified Sector Dual Serial and Quad Serial Flash

feature

16M-bit Serial Flash 2048K bytes, 256 bytes per programmable page, Standard, Dual, Quad SPI, Standard SPI: SCLK, CS#, SI, SO, WP#, Hold#, Dual SPI: SCLK, CS# , IO0, IO1, WP#, Hold#, Quad SPI: SCLK, CS35; , IO0, IO1, IO2, IO3, high-speed clock frequency 120MHz for fast read dual I/O data transfer of 30PF load, up to 240Mbits /s Quad input/output data transfer up to 480mbit/s Software and hardware write protection via software write protect all/partial memory enable/disable protection using WP# pin Upper/lower block protection min. 100000 program/erase cycles data retention typical The 20-year data retention allows XIP (execute-in-place) operations continuous read, 8/16/32/64-byte line feed fast program/erase speed Page Program Time: 0.6ms typical Erase Time: 45ms typica Block Erase Time: Typical 0.15/0.25s Chip Erase Time: Typical 7s Flexible Structure 4K Bytes Uniform Sector 32/64K Bytes Uniform Block Low Power Consumption 1uA Typical Deep Power Descent Current 1uA Typical Standby Current, Advanced Security Features Every 128-bit unique ID4x256 for each device using OTP lock to change the security register discoverable parameter (SFDP) register Single supply voltage Full voltage range: 2.7~3.6V

General Instructions

GD25Q16C (16M-bit) serial flash memory supports standard serial peripheral interface (SPI), temperature range -40℃ to +85℃ and supports dual/quad SPI: serial clock, chip select, serial data I/O0 (SI) , I/O1 (SO), I/O2 (WP), and I/O3 (hold). Dual I/O

Data is transmitted at 240Mbits/s, and four I/O and four output data are transmitted at 480Mbits/s

Equipment operation

SPI mode

Standard SPI

GD25Q16C has serial peripheral interface on 4 signal buses: serial clock (SCLK), chip select (CS), serial

Data In (SI) and Serial Data Out (SO). SPI bus modes 0 and 3 are supported. Input data is locked on rise

The edge of SCLK and data are shifted outward on the falling edge of SCLK

Dual SPI

GD25Q16C supports dual SPI operation when using "Dual Output Fast Read" and "Dual I/O Fast Read" (3BH)

and BBH) commands. These commands allow data to be transferred to or from the device at twice the standard rate

spi. When using dual SPI commands, the SI and SO pins become bidirectional I/O pins: IO0 and IO1.

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