MPC8280CVVUPEA

feature

The main features of the SoC are as follows:

? Double-Problem Integer (G2) Core

- Core version of the EC603e microprocessor

- System core microprocessor supporting 166–450 MHz frequencies

- Separate 16 KB data and instruction caches:

– Four-way set association

– Physical address

–LRU replacement algorithm

-Power Architecture™ Compatible Memory Management Unit (MMU)

- Common On-Chip Processor (COP) test interface

- High performance (SPEC95 benchmark at 450 MHz; 855 Dhrystones MIPS at 450 MHz)

- Support bus monitoring

- Support data cache coherency

- Floating Point Unit (FPU)

?Separate power supply for internal logic and I/O

? Independent PLLs for G2 core and Communications Processor Module (CPM)

- G2 cores and CPM can run at different frequencies for power/performance optimization

- Internal core/bus clock multiplier, providing ratios 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 4.5:1, 5:1, 6:1, 7:1, 8:1

- Internal CPM/bus clock multiplier providing ratios 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1, 8:1 ratios

? 64-bit data and 32-bit address 60x bus

-Bus supports multiple master designs

- Supports single-shot and four-shot burst transfer

- 64-bit, 32-bit, 16-bit and 8-bit port size controlled by on-chip memory controller

- Supports data parity or ECC and address parity

?32-bit data and 18-bit address local bus

-Single bus, support external slave

- Eight-beat burst transmission

- 32-bit, 16-bit and 8-bit port size controlled by on-chip memory controller

?60x to PCI bridge

- Programmable host bridges and proxies

- 32-bit data bus, 66.67/83.3/100 MHz, 3.3 V

- Synchronous and asynchronous 60x and PCI clock modes

- All internal address space available to external PCI hosts

- DMA for memory block transfers

-PCI to 60x address remapping

?PCI bridge

- Compliant with PCI specification version 2.2, supports frequencies up to 66 MHz

- On-chip arbitration

- Supports PCI-to-60x-memory and 60x-memory-to-PCI streaming

-PCI host bridge or peripheral function

- Includes 4 DMA channels for the following transfers:

– PCI to 60x to 60x to PCI

–60x to PCI to PCI-to-60x

–60x to PCI to 60x to PCI

- Includes all configuration registers (automatically loaded from EPROM for the MPC8280 required to configure the PCI standard) as well as message and doorbell cash registers

- Support I2O standard

- Hot-plug friendly (supports hot-plug specification defined by PICMG 2.1r1.0august March 1998)

- Supports 66.67/83.33/100 MHz, 3.3 V specifications

-60x PCI bus core logic, using buffer pool to allocate buffers for each port

-Using local bus signals, no extra pins are required

? System Interface Unit (SIU)

-Clock Synthesizer

- reset the controller

- Real Time Clock (RTC) register

- Periodic interrupt timer

- Hardware bus monitor and software watchdog timer

-IEEE 1149.1jtag test access port

?12-rank memory controller

- Glueless interface to SRAM, page-mode SDRAM, DRAM, EPROM, Flash, etc. User-definable peripherals

- Byte write enable and optional parity generation

- 32-bit address decoding with programmable bank scale

- Three User Programmable Machines, Universal Chip Selector and Page Mode

Pipeline SDRAM Machine

- Byte select 64-bit bus width (60x) and byte select 32 bus width (local)

-SDRAM dedicated interface logic

? CPU cores can be disabled and the device can be used in slave mode to external cores

? Communications Processor Module (CPM)

Embedded 32-bit Communication Processor (CP) uses RISC architecture for flexible support for communication protocols

- Interface with G2 core via on-chip 32 KB dual-port data RAM and on-chip 32 KB dual-port instruction RAM and DMA controller

- Serial DMA channel for receive and transmit on all serial channels

- Parallel I/O registers with open-drain and interrupt capability

- Performs virtual DMA functions for memory-to-memory and memory-to-I/O transfers

-Three fast communication controllers supporting the following protocols:

– Via media independent 10/100 Mbit Ethernet/IEEE 802.3 CDMA/CS interface

Interface (MII) or Reduced Media Independent Interface (RMII)

– 155 Mbps ATM full-duplex synthetic aperture radar protocol via UTOPIA interface, AAL5, AAL1,

AAL0 protocol, TM 4.0 CBR, VBR, UBR, ABR traffic types, up to 64 K external

Connection (MPC8270 does not support ATM)

-transparent

– HDLC (Transparent Channel) up to T3 rate

– FCC2 can also be connected to the TC layer (MPC8280 only)

- Two Multi-Channel Controllers (MCCs) (one MCC on MPC8270)

– Each MCC handles 128 serial, full-duplex, 64 Kbps data channels. Each motor control center can be separated

Divide into four groups of 32 channels each.

– Almost any combination of subgroups can be multiplexed to single or multiple TDMs

Up to 4 TDM interfaces per MCC

- Four Serial Communication Controllers (SCC) same as MPC860, support

The digital part of the following agreement:

– Ethernet/IEEE 802.3cdma/CS

–HDLC/SDLC and HDLC bus

– Universal Asynchronous Receiver Transmitter (UART)

– Synchronous UART

– Binary Synchronous (BISYNC) communication

-transparent

? Universal Serial Bus (USB) controller

- Support USB 2.0 full/low rate compatible

-USB host mode

– Supports control, batch, interrupt and isochronous data transfers

– CRC16 generation and checking

– NRZI encoding/decoding with bit stuffing

– Supports data rates of 12 and 1.5 Mbps (automatic generation of preamble tokens and

data rate configuration) Note that low speed operation requires an external hub.

- Flexible data buffer with multiple buffers per frame

– Local loopback mode with diagnostic support (12 Mbps only)

- Support USB slave mode

– Four independent endpoints support control, bulk, interrupt and isochronous data transfers

– CRC16 generation and checking

–CRC5 check

– NRZI encoding/decoding with bit stuffing

–12 or 1.5 Mbps data rate

- Flexible data buffer with multiple buffers per frame

– Automatic retransmission in case of transmission error

- Two Serial Management Controllers (SMC), same as MPC860

– Provides management for BRI devices as a Generic Circuit Interface (GCI) controller

Time Division Multiplexing (TDM) Channels

-transparent

– UART (low speed operation)

- A serial peripheral interface identical to the MPC860 SPI

- an i2

C controller (same as MPC860 I2C controller)

– Compatible with microfilament

– Multi-Master, Single-Master and Slave modes

- Up to eight TDM interfaces (four on the MPC8270)

– Supports two sets of four TDM channels for a total of eight TDMs (one set of four open

MPC8270 and MPC8275)

– 2048 bytes of SI RAM

– Bit or byte resolution

– Independent transmit and receive routing, frame synchronization

– Supports T1, CEPT, T1/E1, T3/E3, PCM Expressway, ISDN Basic Rate, ISDN

primary rate, free-scale inter-chip digital link (IDL), general circuit interface (GCI) and

User-defined TDM serial interface

- Eight independent baud rate generators and 20 input clock pins for clocking the FCC,

SCC, SMC and Serial Channels

- Four independent 16-bit timers that can be interconnected as two 32-bit timers

• Inverse Multiplexing (IMA) of ATM functions (multiplexing only). Eight-turn support

Transmission Convergence (TC) layer between TDMs and FCC2.

?Transmit Convergence (TC) layer (MPC8280 only)

Microprocessor full range supplier

LS1020AXE7KQB

MPC8270CZUUPEA

FH8065301567414SR1XA

MCIMX6U7CVM08AC

FH8065301487717SR1X6

AM3358BZCZ100

MPC8270CVVUPEA

ELANSC520-100AD

MCIMX6S7CVM08AC

MCIMX6U5DVM10AC

MPC5200CVR400B

MCIMX6Q7CVT08AD

MPC5200CVR400BR2

AM3358BZCZA100

MCIMX6Y2DVM05AA

MCIMX6S5DVM10AC

MCIMX6D7CVT08AD

MIMXRT1064DVL6A

CM8066201920103SR2L2

AM3703CUS100

AM3352BZCZ60

P1013NSE2LFB

MIMXRT1062CVJ5A

AM1707DZKBD4

MCF5282CVM66

AM3352BZCZA100

AM3352BZCZD80

14305R-2000

MCIMX6U5EVM10AC

ATSAMA5D31A-CUR

MCIMX6S6AVM08AC

AM3352BZCZ100

DM3730CUS100

AM3354BZCZ60

AM3354BZCZD80

FH8065301542215SR1X8

MCF5272VM66

MPC8313CVRAFFC

P1022NXE2LFB

MIMXRT1052CVJ5B

CM8066201920404SR2L6

DM3730CBP100

MCIMX6U5DVM10AB

TMS320DM8127BCYE0

TMS320DM8147SCYE2

MIMXRT1052DVL6B

MCIMX6S5EVM10AC

ATSAMA5D36A-CUR

TMS320DM8147SCYE1

MCIMX6U5EVM10ACR

AM3358BZCZA80

ATSAMA5D41B-CUR

AM3354BZCZA80

BV80605001911APSLBLC

CM8063701160603SR0PJ

MCIMX6Q7CVT08AC

ADSP-CM403CSWZ-CF

MCIMX6L2DVN10AC

AM5728BABCXA

MCIMX6U6AVM08AC

T1042NXE7MQB

ATSAMA5D36A-CU

MIMXRT1052CVL5B

MIMXRT1064CVL5A

ATSAMA5D31A-CU

SPC5200CVR400B

ATSAMA5D41A-CUR

TMS320DM8127BCYE3

TMS320DM8148CCYE2

CM8063701211600SR0PK

MPC8270CVRMIBA

MCIMX6X4CVM08AB

AM4376BZDNA100

MIMXRT1062DVL6A

MCF5235CVM150

FH8065501516710SR1D1

AM3354BZCZA100

ATSAMA5D41B-CU

FH8065501516702SR1CW

LS1020AXN7KQB

MIMXRT1062DVJ6A

MIMXRT1051DVL6B

MC7448VU1400ND

MCIMX6X1CVO08AB

QU80386EXTC33

MPC8313EVRAFFC

MIMXRT1061DVL6A

W65C02S6TPG-14

TMS320DM8127SCYE3

MPC880CVR66

MIMXRT1061CVL5A

P2020NXN2MHC

ATSAMA5D35A-CU

CM8062101048401SR0KW

TMS320DM8127BCYE1

P1021NXE2HFB

P1020NSE2HFB

MIMXRT1052CVL5A

MPC8270CZUUPEA