Features

gt; 155.5 mbps (77.7 MHz) exchange rate

accepting small switch (350 mv) differential signal level

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123] ultra -low power consumption

5V, maximum deviation 25 ° C

6.0 NS maximum delay

# 8226; Industrial operation temperature range

Military operation temperature range option

surface installation packaging (SOIC) and (LCCC)

# 8226; Pointing compatible with DS26C32A, MB570 (PECL) and 41LF (PECL)

Support open input failure protection

Short-circuit and end-connected input fault protection

Compatible IEEE 1596.3 SCI LVDS standard

meet ANSI/TIA/EIA-644 LVDS standard

#8226; can be used for standard circuit diagram (SMD) 5962-95834

Instructions DS90C032

is a four-way CMOS differential line receiver dedicated Design of power consumption and high data rate. The device supports a data rate of more than 155.5 Mbps (77.7 MHz) and uses a low -voltage differential signal (LVDS) technology.

DS90C032 accepts low voltage (350 millivolt) differential input signals and converts it to CMOS (compatible TTL) output level. The receiver supports the three -state function that can be used for multi -way replication output. The receiver also supports the input fault protection of the road, short circuit and end -connection (100Ω), plus external fault protection bias. Under two types of faulty protection conditions, the receiver output will be very high.

DS90C032 and the accompanying line drive (DS90C031) provides a new method of replacing high -power pseudo -ECL devices for high -speed point interface applications.

Wiring chart

Function diagram and authentic table

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Parameter measurement information

Typical application [

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Application information

LVDS driver and receiver are mainly used in simple points to point configuration, as shown in Figure 6. This configuration provides a clean signaling environment for the fast edge rate of the drive. The receiver is connected to the driver through a balanced medium. This medium can be a standard twisted cable, parallel parallel pair of cables or simple PCB traces. Generally, the characteristics of the medium are within the range of 100Ω. The terminal resistance of 100Ω should be selected to match the medium and as close to the receiver input pin as much as possible. The terminal resistor converts the current generated by the drive to the voltage detected by the receiver. Other configurations are also available, such as multi -receiver configuration, but the impact of midflow connectors, cable heads, and other impedance discontinuousness, ground movement, noise capacity and terminal load of the terminal load.

DS90C032 differential line receiver can detect signals as low as 100 MV within the range of ± 1V (centered on+1.2V). This is related to the driver's offset voltage (usually+1.2V). The driver signal is centered on the voltage and may move ± 1V around the center point. The ± 1V offset may be the result of the ground power difference between the ground and the grounding benchmark of the drive, the co -mode effect of the coupling noise, or the combination of the two. Both receivers input pin should meet the input voltage range of the work input voltage 0V to+2.4V (from each pin to the ground measurement), and the ESD protective circuit may be turned on after these limits. Essence

The receiver fault protection

LVDS receiver is a high -gain and high -speed device, which enlarge a small differential signal (20mv) to the CMOS logic level. Due to the high gain and strict threshold of the receiver, you should pay attention to prevent noise from appearing as a valid signal.

The internal fault protection circuit design of the receiver is used to generate or absorb a small amount of current, and provides fault protection for the input of floating, end -connecting or short -circuit receivers (a stable state of high output voltage).

1. Open the input pin. DS90C032 is a four -way receiver device. If the application only needs one, 2 or 3 receivers, the unused channel input should be kept open. Do not input the unused receiver to the ground or any other voltage. The input is biased from the internal high -value upper and drop -down resistance to set the output to a high state. This internal circuit ensures the high -stable output state of the opening input.

2. Termination input. TDS90C032 requires external fault protection bias to terminate the input failure protection.

Terminal input failure protection means that the receiver has a 100Ω terminal at its input terminal and the drive is in the following situation. Unplug the bus, or the drive output is in a triple or power -off state. The use of external bias resistors provides a small deviation to set the difference input voltage, and the line is non -drive, so the receiver output willIn high state. If the driver is removed from the bus and the cable still exists and floats, the unplug the cable may become a floating antenna that can pick up noise. The LVDS receiver is designed to detect very small amplitude and width signals and restore it to the standard logic level. Therefore, if the cable receives a differential noise of more than 10mv, the receiver may respond. In order to ensure that any noise is regarded as co -mode rather than differentials, it is recommended to use balanced interconnect and twisted cables, because they help ensure that noise is coupled to two lines and is rejected by the receiver.

3. Enter short circuit. If the receiver inputs a short circuit failure, which causes the 0V differential input voltage, the receiver output will remain in high state. Within 1.2V ± 1V), short -circuit input fault protection is not supported within the scope of the equipment (1.2V ± 1V). It is supported only when the input is short -circuited without applying an external co -mode voltage.

4. Work in an environment with differential noise greater than 10mV.

For system -level and signal quality, TI recommends using external fault protection bias on its LVDS receiver. First of all, it is only necessary to use it for applications that need to be protected by faulty protection. Secondly, faulty protection bias is now an application design parameter that can be customized according to the specific application. In the applications in a low noise environment, they may choose to use very small deviations (if so). For imbalances and/or applications in high -noise environments, they can choose to further enhance fault protection. The TIS LVDS user manual provides detailed calculations for selecting the correct faulty protection bias resistor. Third, in a non -drive state, the co -mode voltage is biased. This is selected as the offset voltage (VOS) close to the nominal driver. Therefore, when switching between the driver and non -driving state, the co -mode modulation on the bus is kept at the minimum. For other faulty protection bias information, please refer to the application instructions AN-1194 (SNLA051) to learn more details.

The area of DS90C032 is the same as that of the industry standard 26LS32 (RS-422) receiver.

典型性能特征

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