-
2022-09-24 21:37:18
HMC626ALP5E Chinese information, application circuit, data sheet, pin diagram, price specially provided by Rockchip Parkway
HMC626ALP5E brand HITTITE, quantity 18900, available from stock, Miss Zhang from Rockchip Parkway 18823380190
HMC626ALP5E parameters:
HMC626ALP5E pin diagram:
Features? Open NAND Flash Interface (ONFI) 2.2 Compliant
Multilevel Cell (MLC) Technology
Org page size X8: 4320 bytes (4096 + 224 bytes)
Block size: 256 pages (1024K + 56K bytes)
– Plane size: 2 x 2048 pieces per aircraft
– Device size: 4096 blocks for 32G; _64GB: 8192 blocks; _128GB: 16,384 blocks
?Synchronous I/O performance
Up to Sync Timing Mode 5
Clock rate: 10ns (DDR)
Read per pin/write throughput: 200 MT/s
Asynchronous I/O performance
Up to Asynchronous Timing Mode 5
WC: 20ns (MIN)
Array performance
– Read page: 50µs (MAX)
Program Page: 1300µs (TYP)
– Erase block: 3ms (typ.)
Operating Voltage Range”–VCC: 2.7–3.6V–VCCQ: 1.7–1.95V, 2.7–3.6V
Command Set: ONFI NAND Flash Protocol
advanced instruction set
program cache
read cache order
read cache random
One Time Programmable (OTP) Mode
Multiplane commands
Multi-LUN operation
The first block (block address 00H) is valid when the ship-
from factory PED. For minimum required ECC, see
Error Management (page 101).
RESET(FFH) requires the first command after power-up