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2022-09-24 21:37:18
PI6C59 High-Performance Clock Buffer for Networking Applications
The PI6C59xxxxx family of 1.5 GHz to 6 GHz high-performance clock buffers feature 2, 4, 6, 12, and 16 outputs for optimized designs. These devices use a reference clock input to generate multiple copies of the same frequency output, making them cost-effective in designs that require multiple frequency copies and always maintain a synchronized clock. The additive jitter of these fanout buffers is also very low, around 10 fs, which provides ample headroom for the latest high-speed designs with a total jitter budget of 150 fs or less. The PI6C59xxxxx family is suitable for PAM4 Ethernet switches, routers and data center applications. These devices can also be used in industrial and embedded applications supporting high port counts.
characteristic
Multiple output combinations
2, 4, 6, 12 and 16 outputs for design optimization
Ultra-low additive jitter of <0.01 ps
Provides headroom for high-performance clocking requirements
All output combinations available (LVPECL, LVDS and CML)
Meets Design Chipset Input Clock Requirements
2.5 V or 3.3 V power supply
Universal power rail support
Compact QFN Package
Optimized board space
application
switch
router
data center
industry
Embedded Infrastructure
PI6C5912006ZHIEX, PI6C5921516ZDIEX, PI6C5912016-01FAIEX, PI6C5912012ZDIEX
PI6C5912016ZDIEX, PI6C5913004ZHIEX, PI6C5922504ZHIEX, PI6C5916004ZHIEX,
PI6C59S6005ZDIEX, PI6C5921512ZDIEX