? Embedded Processor Controller SAK-C505CA-4EM CA Features (continued): ? 32 + 2 digital I/O lines - 4 8-bit digital I/O ports 2-bit digital I/O port (port 4) - port 1 with mixed analog/digital I/O capability? Embedded processor controller SAK-C505CA-4EM CA Three 16-bit timers/counters, timers (C501 compatible) - 0/1 timers 2 and 4 channels 16-bit Capture/compare operations? Embedded processor controller SAK-C505CA-4EM CA Full-duplex serial interface with programmable baud rate generator (USART)? Embedded processor controller SAK-C505CA-4EM CA fully possible Module, version 2.0 B compatible (C505C and C505CA) - 256 registers located in external data/data byte memory area - 1 MBaud baud rate can be used when operating frequency equal to or higher than 8 MHz - internal clock can be prescaled when input frequency Over 10 MHz? On-chip A/D converter - 8 analog inputs C505/C505C: 8-bit resolution - C505A/C505CA: 10-bit resolution? Twelve interrupt sources with four priority levels? On-chip analog support logic (enhanced Hook technology TM)? Programmable 15-bit watchdog timer? Oscillator supervision? Fast power-on reset? /INT0 wake up or P4.1/RXDC pin??Pin P-MQFP-44 package configuration compatible with C501,C504,C511/C513-family?Temperature range:sa-c505 version TA=-40 to 110°Cak- TA = -40 to 125°C for the c505 version

• The C505 has four 8-bit I/O ports and one 2-bit I/O port. Port 0 is an open bidirectional I/O port, while ports 1 through 4 are quasi-bidirectional I/O ports with internal pull-up resistors. This means that when configured as inputs, ports 1 to 4 will be pulled high and will source current when pulled low externally. Port 0 will float when configured as an input.

The output drivers for ports 0 and 2 and the input buffer for port 0 are also used to access external memory. In this application, port 0 outputs the low byte of the external memory address, time multiplexed with the byte being written or read. When the address is 16 bits wide, port 2 outputs the high byte of the external memory address. Otherwise, the Port 2 pins will continue to release the contents of the P2 SFR. In this function, port 0 is not an open drain port, but uses a strong internal pull-up FET.

Port 4 is a 2-bit I/O port with alternate functions specific to the CAN controller. The 8 analog input lines are implemented as mixed digital/analog inputs. Eight analog inputs, AN0-AN7, are located on Port 1 pins P1.0 to P1.7. After reset, all analog inputs are disabled and the associated pins of Port 1 are configured as digital inputs. The analog functions of specific Port 1 pins are enabled by bits in SFR P1ANA. Writing a 0 to a bit position of P1ANA designates the corresponding pin to operate as an analog input.