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2022-09-24 21:48:02
Embedded Processor Controller R5F104AEASP#V0
Ultra Low Power Technology? VDD = 1.6 to 5.5 V Single Supply Voltage Can Operate Device 1.8 V Low Voltage? Stop State? Stop Mode? Snooze Mode RL78 CPU Core? CISC Architecture with Strength Pipeline? High-speed (0.03125μs: @ 32 MHz operating high-speed on-chip oscillator) Ultra-low speed (30.5μs: Supports multiply/divide/multiply and accumulate instructions. Address space: 1 MB? General-purpose registers (8-bit registers × 8) × 4 banks? On-chip memory: 48 2.5 KB flash memory? Code flash memory: 16 to 512 KB? Block size: 1 KB? Block erase and rewrite prohibited (security function)? Shield window function) Flash? Data flash: 4 KB, 8 KB? Background operation (BGO): Instructions can be executed from program memory while rewriting data flash.? Number of rewrites: 1,000,000 times (TYP). :VDD = 1.8 to 5.5 V high speed on-chip oscillator? Choose from 64 MHz, 48 MHz, 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz? High Accuracy: ±1.0%_(VDD = 1.8 - 5.5 V, TA = -20 + 85°C Operating Ambient Temperature? T = -40 + 85°C (User Application, D: Industrial Application) ?T = -40 + 105°C (G: On-chip Voltage Detector (LVD) (interrupt and reset selected from 14 levels) Data Transfer Controller (DTC) Transfer Mode: Normal Transfer Mode, Repeated Transfer Mode , Block transfer mode · Activation source: activated by the interrupt source. ? Chain transfer function
Embedded Processor Controller R5F104AEASP#V0 Event Link Controller (ELC)? 19 - 26 types of event signals can be linked to specified peripheral functions. Serial Interface? CSI: 3 - 8 Channels? UART/UART (lin bus support): Embedded Processor Controller R5F104AEASP#V0 3 or 4 Channels? I2C/Simplified I2C: 3 - 8 Channels Timer? 16-bit Timer: Channel 8 to 12 (Timer Array Unit (τ): Channel 4 to 8, Timer RJ: Channel 1, Timer Richard Dawkins: Channel 2, Timer RG: Channel 1)? 12 Bit interval timer: 1? Real-time clock channel: 1 channel (calendar 99, alarm function, clock callback function)? Watchdog timer: 1 channel (operational dedicated low-speed on-chip oscillator) A/D converter? 8/10-bit resolution A/Embedded processor controller R5F104AEASP#V0 D converter (VDD = 1.6 to 5.5 V)? Analog input: 8 to 20 channels? Internal reference voltage (1.45 V) and temperature sensor D/ A converter? 8-bit D/A converter resolution (VDD = 1.6 to 5.5 V)? Analog output: no or two channels? Output voltage: 0 V VDD? Operation mode: Comparator high-speed mode, embedded processor controller R5F104AEASP#V0 Comparator low-speed mode, window mode? External reference voltage or internal reference voltage can be selected as the reference voltage. I/O ports? I/O ports: 26 - 92 (N-ch open channel I/O [withstand voltage 6 V]: 2 to 4, N-ch open channel I/O (VDD tolerance / EVDD tolerance): 10 - 28)? Can be set up as N-ch open drain, TTL input buffer, and on-chip pull-up resistor? Different potential interfaces: Can be connected to a 1.8/2.5/3 V? On-chip critical device interrupt function? On-chip clock output/buzzer output controller Others? On-chip BCD (binary-decimal) correction circuit