The programmable logic XC3S1400AN-4FGG676I Spartan®-3AN FPGA family combines the best features of the leading, programmable logic XC3S1400AN-4FGG676I low-cost FPGA with non-volatile technology in a broad density range. Programmable Logic XC3S1400AN-4FGG676I This family of products combines all the features of the Spartan-3A FPGA family with leading technology in system flash configuration and non-volatile data storage. The SPARTAN-3AN FPGAs are part of the extended SPARTAN-3A family, which also includes the SPARTAN-3A FPGAs and the higher density SPARTAN-3A DSP FPGAs. The Spartan-3AN FPGA family is ideal for space-constrained applications such as blade servers, medical devices, automotive infotainment, telematics, GPS and other small consumer products. Combining FPGA and Flash technologies, the programmable logic XC3S1400AN-4FGG676I minimizes chip count, PCB trace and overall size while improving system reliability. The Spartan-3AN FPGA internal configuration interface is completely self-contained, increasing design security. Home maintains full support for external configurations. Programmable Logic XC3S1400AN-4FGG676I Spartan-3AN FPGA is the world's first non-volatile FPGA with multi-boot capability, Programmable Logic XC3S1400AN-4FGG676I supports two or more configuration files on one device, allowing field upgrades , test mode, or multiple system configurations for alternate configurations. Using the advanced 90nm Spartan-3A device feature set removes the limitations of traditional non-volatile FPGAs. and many more. ?Integrated Robust Configuration Memory?Saves Board Space?Improves Ease of Use?Simplifies Design Issues??Reduces Support for Large User-Available Non-Volatile Memory? Robust 100k flash program/elimination cycles? 20-year flash data retention? Security features provide bitstream anti-cloning protection

Configuration interface? Unique DNA device serial number buried in each device design verification to prevent unauthorized copying Consumption? Retains all design state and FPGA configuration data? Fast response time, typically less than 100μs? , LVTTL, HSTL, and Surrey single-ended signal standards? 3.3v, 2.5v, 1.8v, 1.5v and 1.2v signals? Horse 24v output driver? 3.3±10% compatibility and hot-plug compliance? 622+ Mb/s data rate/I/O? DDR/DDR2 SDRAM supports up to 400 Mb/s? LVDS, standard deviation, mini-LVDS, PPD, and HSTL/differential I/O? Surrey rich, flexible Logic resources? Density 25344 logic cells? Optional shift register or distributed memory support? Enhanced 18 x 18 multiplier with optional pipeline? Hierarchical SelectRAM? Efficient distributed RAM? 8 Digital Clock Managers (DCMs)?