Static random access memory N02L63W2AB25I ~2Mb ultra-low power asynchronous CMOS SRAM 128Kx16 bit

The static random access memory N02L63W2AB25I is an integrated memory device containing a 2 Mbit static random access memory arranged in 16 bits for 131,072 words. The device is designed and manufactured using the semiconductor company's advanced CMOS technology to provide high-speed performance and ultra-low power consumption. The basic design is the same as Semiconductor's SRAM N02L63W2AB25I, which handles operating at higher voltages. The device features single-chip enable (CE) control and output enable (OE) for easy memory expansion. Byte controls (UB and LB) allow independent access to the upper and lower bytes. The SRAM N02L63W2AB25I is the best choice for a variety of low-power applications such as battery backup and handheld devices. The device can operate over a very wide temperature range of -40°C to +85°C and is available in a JEDEC standard package compatible with other standard 128Kb x 16 SRAMs.

Features? Single supply range wide 1.65 to 2.2 volts? Very low standby current 0.5µA 1.8V (typical)? Very low operating current 1.4mA at 1.8V and 1µs (typical) Ma? Page mode operating current is very low 0.5 At 1.8v and 1µs (typical)? Simple memory control MCU for independent enable (CE) byte control byte operation Allow output (OE) memory expansion? Low voltage data retention Vcc = 1.2v? Soon allow output access time 30 ns OE access time? Auto power down standby mode? Compatible with TTL tri-state output drivers? Space saving compact BGA package

N02L63W2A

Absolute Maximum Ratings1

1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only, and the functional operation of the equipment under these or any other conditions above those stated in the operating section of this specification is not covered. Prolonged exposure to absolute maximum rating conditions may affect reliability.

SRAM N02L63W2AB25I Bullet Rating Unit Voltage at Any Pin Relative to VSS VIN, VCC -0.3 + 0.3 V Voltage VCC Supply Relative to VSS VCC -0.3 to 4.5 V Power Consumption PD 500 mW Storage Temperature Tested -40 to 125 oC Operating Temperature TA -40 + 85 oC Soldering temperature and time TSOLDER 260 oC, 10 seconds oC

Operating characteristics (over specified temperature range

1. Typical values are measured at Vcc=Vcc Typ. , TA=25℃, not 100% tested.

Max Cell Supply Voltage VCC 2.3 3.0 3.6 V Voltage VDR Chip Disabled3 Data Retention 1.8 - 3.6 V Input High Voltage VIH 1.8 + 0.3 V Supply Voltage Input Vil -0.3 - 0.6 V Low Voltage Output High Voltage VOH IOH = 0.2 ma VCC - 0.2 V Low Voltage Output Artificial Volume = -0.2 ma 0.2 V Input Leakage Current Ili VIN = 0 to 0.5 VCCµA Leakage Current Output ILO OE = VIH or Chip Disable 0.5µA Read/Write Operation Supply Current @ 1 Time2µs Cycle SRAM N02L63W2AB25I

2. The output is disabled when this parameter is specified to avoid external loading effects. The user must add the current required to drive the expected output capacitance in the actual system.

ICC1VCC=3.6 V, VIN=VIH or VIL chip enabled, IOUT = 0 2.0 4.0 mA