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2022-09-24 21:48:02
Editable logic device EPM1270T144C5N
Transient MAX II™ family of nonvolatile cplds based on a 0.18-µm 6-layer-metal-flash process, with densities from 240 to 2210 logic elements (LEs) (128 to 2210 equivalent macrocells) and non-volatile storage 8 Kbits. Compared to other CPLD architectures, maxi devices offer high I/O counts, fast performance, and reliable fitting. maxi devices feature multiple olt cores, user flash memory (UFM) blocks, and enhanced in-system programmability (ISP) designed to reduce cost and power consumption, while providing support for bus bridging, I/O expansion, power-on-reset (POR), and Applications such as sequence control and device configuration control provide programmable solutions.
characteristic
Maxim CPLDs have the following features: Low-cost, low-power CPLDs ■■ Instantaneous, non-volatile architecture ■ ■ Standby current as low as 25 μA ■ ■ Offers fast propagation delay and clock-to-output times Provides four global clocks with Two clocks per available block of logic array (lab) UFM hinders 8 Kbits for non-volatile storage MultiVolt core enables external supply device voltage 3.3 V/2.5 or 1.8 V MultiVolt I/O interface supports 3.3 V, 2.5 V, 1.8 V, I/Os fully compliant with Peripheral Component Interconnect Special Interest Group (PCI SIG) PCI Local Bus Specification, Supports Hot Nesting Built-in Joint Test Action Group (JTAG) Boundary Scan Test (BST) circuits, IEEE Std compliant . 1149.1-1990 Standard