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The SN65HVD10, SN75HVD10, SN65HVD11, SN75HVD11, SN65HVD12, and SN75HVD12 bus transceivers combine a three-state differential line driver and differential input line receiver and operate at 3.3V. They are designed for balanced transmission lines and meet or exceed ANSI standards TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits designed for bidirectional data communication on multipoint bus transmission lines. The driver and receiver have active-high and active-low, respectively, so that these can be connected externally together as a directional control function. Very low device standby supply current can be achieved by disabling the driver and receiver.

The driver differential output and receiver differential input are internally connected to form a differential input/output (I/O) bus port designed to provide minimal loading to the bus when the driver is disabled or VCC=0. These parts have a wide range of positive and negative common-mode voltages, making them suitable for in-line applications.

3.3V Power Bus - Pin ESD Protection Over 16 kV HBM 1/8 Cell Load Option (Up to 256 Nodes on Bus) Selectable Driver Output Transition Time, Signal Rates(1) 1 Mbps, 10 Mbps and 32 Mbps Meets, or exceeds the requirements of ANSI TIA/EIA-485-A bus short circuit protection, from -7V to 12V low current The no-power and power-off protection of the SN 75176 footprint (1) The signaling rate of a line is the number of voltage transitions per second, expressed in units per second (bits per second).