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2022-09-24 22:06:10
HI3515CRQCV100 stock supply, data sheet, PDF document-Dahn Technology
HI3515CRQCV100 HiSilicon video chip integrated circuit 5000PCS
HI3515CRQCV100 Price:
HI3515CRQCV100 performance:
HI3515CRQCV100 parameters:
Features? Open NAND Flash Interface (ONFI) 2.2 Compliant
Multilevel Cell (MLC) Technology
Org page size X8: 4320 bytes (4096 + 224 bytes)
Block size: 256 pages (1024K + 56K bytes)
– Plane size: 2 x 2048 pieces per aircraft
– Device size: 4096 blocks of 32G ;_
64GB: 8192 blocks;_
128GB: 16,384 blocks
?Synchronous I/O performance
Up to Sync Timing Mode 5
Clock rate: 10ns (DDR)
Read per pin/write throughput: 200 MT/s
Asynchronous I/O performance
Up to Asynchronous Timing Mode 5
WC: 20ns (MIN)
Array performance
– Read page: 50µs (MAX)
Program Page: 1300µs (TYP)
– Erase block: 3ms (typ.)
Operating Voltage Range”–VCC: 2.7–3.6V–VCCQ: 1.7–1.95V, 2.7–3.6V
Command Set: ONFI NAND Flash Protocol
advanced instruction set
program cache
read cache order
read cache random
One Time Programmable (OTP) Mode
Multiplane commands
Multi-LUN operation
The first block (block address 00H) is valid when the ship-
from factory PED. For minimum required ECC, see
Error Management (page 101).
RESET(FFH) requires the first command after power-up