Product Description

The PI7C9X2G404SL is a PCIExpress™ 2.14-port/4-lane PCI Express SlimLine packet switch designed to meet the latest low-power, lead-free (Pb) and green system requirements. PI7C9X2G404SL is a high-performance, cost-effective solution that can be implemented in systems such as embedded systems, Wi-Fi routers/gateways, printers, storage, combo cards, HBAs, set-top boxes, motherboards, laptops, docking stations and others Power sensitive high performance platform. The name of the series, SlimLine, refers to Diodes' proprietary power-saving PowerSave technology.

PI7C9X2G404SL provides one upstream port and three x1 downstream ports. PI7C9X2G404SL provides users with flexibility to expand or fan-out from various I/O bridges such as PCH, ICH, IOH, embedded MCU, FPGA and other specialized ICs.

Industry Code Compliance

PCIExpress® Base Specification, Revision 2.1

PCI Express CEM Specification, Revision 2.0

PCI-to-PCI Bridge Architecture Specification, Revision 1.2

Advanced Configuration Power Interface (ACPI) Specification

feature

PCISIG PCI Express 2.1 Certification

Integrated 100MHz clock buffer per downstream port

reliability, availability and maintainability

Support for data poisoning and end-to-end CRC

Advanced error reporting and logging

IEEE 1149.1 JTAG interface supports link power management

Supports L0, L0s, L1, L2, L2/L3 ready and L3 link power states

Active state power management for L0 and L1 states Device state power management

Supports D0, D3 Hot and D3 Cold

D3 3.3V auxiliary power support in cold power state

Supports a maximum payload size of up to 512 bytes

Power consumption: 0.65W typical in L0 normal mode, 0.2W typical in L1 mode

Industrial temperature range: -40°C to 85°C

MTBF: 50, 927, 360 hours

Package: 128-pin LQFP 14mm x 14mm

Lead Free and 100% Green

Enhancements

Programmable driver current and de-emphasis level per port

150ns typical latency for running packets through the switch without blocking

Supports "pass-through" (default) as well as "store-and-forward" modes to switch packets

Advanced power saving

Empty downstream ports are set to idle

When any port enters L1 or ASPM L1, the clock to the corresponding circuit is turned off

Access Control Service (ACS) supporting peer-to-peer traffic

Supports Address Translation (AT) packets for SR-IOV applications

Supports Latency Tolerance Reporting (LTR) to improve platform power management

Support for Optimized Buffer Flush Fill (OBFF) to improve platform power management

application

Wireless AP/Router

Wired/Wireless Remote/Data Communication

Embedded Systems

Set-top boxes and consumer devices

industrial control

NAS/Storage

Printer/MFP

peripheral equipment

PCIe Monitoring and Combination Cards

Laptop internal PCIe fan-out

PC motherboard PCIe slot expansion