Features

● 125MSPS update rate

● Single power supply:+3.3V or+5V

● High SFDR: 68dB, FOUT 20MHz

] ● Low failure: 2pvs

● Low power:+5V at 310MW

● Internal reference

● Power off mode: 23MW

Application

Application

Application

Application

Application

123]

● Communication:

-Base, Wireless LAN, Wireless LAN

-The baseband I/Q modulation

● Medical/testing instruments

] ● Any waveform generator (ARB)

● Direct digital synthesis Instructions

DAC2900

is a single piece, 10 digits, 10 digits , Dual -channel, high -speed digital modulus (DAC), can provide high dynamic performance after optimization, and only consume only 310MW on+5V single power supply.

At a high update rate of up to 125msps, the DAC2900 provides excellent dynamic performance and can generate very high output frequency, which is suitable for the direct intermediate frequency application. DAC2900 has optimized communication applications. In communication applications, processing separation rate I and Q data, while maintaining a close gain and offset matching.

Each DAC has a high impedance differential current output, which is suitable for single -end or differential analog output configuration.

DAC2900 combines high dynamic performance and high throughput, creating an economic efficient solution for various waveform synthetic applications:

Sex provides resolution of 10 -bit (DAC2900), 12 -bit (DAC2902) and 14 -bit (DAC2904).

compatible with AD9763 double pins DAC.

gain matching is usually 0.5%of the fulfillment, and the offset matching is specified to maximize 0.02%.

DAC2900 adopts advanced CMOS processes; segmented structures to minimize output fault energy and maximize dynamic performance.

All digital inputs are+3.3V and+5V logic compatibility. DAC2900 has internal reference circuits and allows external reference.

DAC2900 provided in the form of TQFP-48 packaging, and specified within the extended industrial temperature range of -40 ° C to+85 ° C.

Preface Figure

Digital input and digital input andTiming

The data input port of DAC2900 accepts standard coding, and the data bit D9 is the highest effective position (MSB). The converter output supports the clock rate up to 125msps. The best performance is usually achieved through symmetrical writing and clock duty cycle; however, as long as the timing specification is met, the duty cycle may be different. In addition, settings and maintenance time can be selected within its stipulated restrictions.

All digital inputs in DAC2900 are compatible with CMOS. The logic threshold depends on the digital power voltage of the application, so they are set to about half of the power supply voltage; VTH +VD/2 (± 20%tolerance). DAC2900 is designed to work under the digital power supply (+VD) of+3.0V to+5.5V.

The two converter channels in the DAC2900 consist of two independent 10 -bit parallel data ports. Each Dacchaannel is input controlled by its own group (WRT1, WRT2) and clocks (CLK1, CLK2). Here, the WRT line control channel input lock memory, CLK line control DAC memory. The data is first loaded from the rising edge of the WRT line to the input lock. The next decline of the data is provided to the DAC memory in the WRT signal. At the next rising edge of the CLK line, DAC is updated with new data, and the simulation output signal will change accordingly. The DAC2900 dual -locking structure generates a definition sequence for the WRT and CLK signals, which is represented by the parameter TCW . When the CLK rising edge appears at the same time or before or before the WRT signal rising edge, the correct timing is observed. Connecting the WRT and CLK lines can meet this condition. Note that all specifications are measured in the case of the WRT and CLK lines.

Typical features In TA 25 ° C,+va +5V,+vd +3.3V, the differential output iOUTFS 20mA, 50 double -end load, sfdr, sfdr Gundam Nyquist, unless otherwise explained.

Application information

Operation theory

DAC2900's architecture uses current control current control Technology to achieve fast switching and high updates. The core component in a single DAC is a segmented current source array, which is designed to provide a full -scale output current of up to 20mA, as shown in Figure 1. The internal decoder addresss the differential current switch at the DAC update, and forms a corresponding output current by turning all current to output and node iOut or iOUT. The complementary output provides the differential output signal. Compared with the single -end operation, the dynamic performance is improved by reducing the occurrence of occasional harmonic, co -mode signals (noise), and double peak output signals.

SegmentationThe structure significantly reduces the fault energy and improves the dynamic performance (SFDR) and DNL. The current output keeps a very high output impedance greater than 200KY.

Full marking output current is determined by the ratio of internal reference voltage (1.24V) and external resistor RSET. The IREF obtained is multiplied by the internal multiplied coefficient 32 to generate an effective DAC output current. The range of this current can be from 2mA to 20mA, depending on the value of the RSET.

DAC2900 is divided into two parts: digital and simulation, each part is powered by its own power pins. The number parts include the input locks and decoder logic of the edge, and the simulation part includes the current source array and its related switches and reference circuits.

DAC transmission function

Full marking output current iOUTFS is the sum of two complementary output currents:

A single output current depends on it depends DAC code can be expressed as:

Among them, #39; code #39; In addition, IOUTFS is a reference current Iref function, which is determined by the reference voltage and external settings resistance RSET.

In most cases, the complementary output will drive the drive resistance load or terminal transformer. The signal voltage will be generated on each output according to the following conditions:

The load resistance value is limited by the DAC2900 output compliance specification. In order to maintain the specified linear performance, the voltage of iOut and IOUT should not exceed the maximum allowable compliance range.

The two single -end output voltage can be combined to obtain the total differential output swing:

Simulation output

DAC2900 provided provides provided Two complementary current output, iOUT and IOUT. The simplified circuit of the simulation output level of differential topology is shown in Figure 2. The output impedance of iOUT and IOUT is combined by the parallel switch, current source and related parasitic capacitors.

The signal voltage may generate on the two outputs of iOut and iOUT. The negative value-1V is given by the breakdown voltage of the CMOS process. Excellent than the limit will affect the reliability of the DAC2900 and even cause permanent damage. When the full marking output is set to 20mA, the positive rules are equal to 1.25V, and the simulation power supply of+VA 5V is used. Please note that the compliance range is reduced to about 1V for the selected output current of iOutfs 2mA. It should be noted that the configuration of the DAC2900 does not exceed complianceScope to avoid distortion performance and overall linearity.

When the maximum full-scale output signal is limited to about 0.5VP-P, the best distortion performance can usually be obtained. 50 Double -end load and 20mA full -scale output current is the case. By selecting the appropriate transformer and maintaining the optimal voltage level of iOUT and IOUT, various loads can adapt to the output of DAC2900. In addition, the combination of differential output configurations with transformers will help achieve excellent distortion performance. Common model errors, such as even -order Harmon IC or noise, can be greatly reduced. This is especially true in the case of high output frequency.

For applications that require the best distortion and noise performance, it is recommended to choose the full standard output of 20mA. For applications that require low power consumption but tolerate slightly reduced performance levels, you can consider reducing the range of full range to 2mA.

Output configuration

The current output of DAC2900 allows multiple configurations, some of which are shown in Table 1. As mentioned earlier, the use of the differential output of the converter will generate the best dynamic performance. This differential output circuit can be composed of RF transformer or differential amplifier configuration. The transformer configuration is suitable for most applications that AC coupling, while the operational amplifier is suitable for DC coupling configuration.

For applications that require a single output voltage, you can consider single -end configuration. Connect a resistor from any output to ground, and convert the output current into a ground reference voltage signal. In order to improve the VCA, I-TO-V converter can be used. This will lead to negative signal offset, so a dual power supply is needed.

Transformer differential movement

The use of RF transformer provides a convenient way to convert the difference output signal into a single -end signal, and at the same time achieve excellent dynamic performance (see Figure 3). Select the appropriate transformer carefully according to the output spectrum and impedance requirements. The advantage of the configuration of differential transformers is to significantly reduce the co -mode signal, thereby improving the dynamic performance within the wide frequency range. In addition, by selecting the appropriate impedance ratio (winding ratio), the transformer can provide the best impedance matching, and at the same time control the soft voltage of the converter output. The model ADTT1-1 (via miniature circuit) has a ratio of 1: 1 and can be used to connect DAC2900 and 50 load. This will lead to the load of each output iOUT and IOUT to 25 The output signal is a communication coupling and inherently inherent due to its magnetic coupling.

As shown in Figure 3, the center tap of the transformer is grounded. This forced the voltage swing on iOut and IOUT to the center of 0V. In this case, the two resistors RL can be replaced with a RDiff or completely omitted. This method should be used only when all components approach each other and the bobby ratio is not important.The complete power transmission from DAC output to load can be achieved, but the range of output is compliant. Alternatively, if the center tap is not connected, the signal swing will be located in the center of RL IOUTFS/2. However, in this case, the two resistors RL must be used to enable the necessary DC current for two outputs.

Differential configuration of the operation amplifier

If the application requires DC coupling output, you can consider using the differential amplifier, as shown in Figure 4. The four external resistors need to configure the voltage feedback amplifier OPA680 as the differential amplifier to perform differential to a single -end conversion. Under the configuration, the DAC2900 generates a 0.5VP-P differential output signal at the load resistor RL. The selection of the resistance value is to produce a symmetrical load of 25 because the input impedance of the differential amplifier is connected with the resistor RL, so it should be considered.

OPA680 configuration to gain to 2. Therefore, the use of 20mA full -scale output operation DAC2900 will generate a voltage output of ± 1V. This requires the amplifier to work in the case of dual power (± 5V). The tolerance of the resistor usually sets the limit that can achieve co -mode suppression. It can be improved by fine -tuning resistor R4.

This configuration usually provides lower AC performance than the transformer solution discussed earlier, because the amplifier introduces another distortion source. The appropriate amplifier should be selected according to its conversion rate, harmonic distortion, and output swing characteristics. Consider using high -speed amplifiers such as OPA680 or OPA687. By adding a small capacitor CDiff between the output side and iOut, the AC performance of the circuit can be improved (as shown in Figure 4). This will introduce a solid point to create a low -pass filter to limit the rapid output signal level of DAC. Conversely, this may drive the amplifier to enter the conversion limit or overload status; both of them will cause excessive distortion. Differential amplifiers can be easily modified to increase the level offset to meet the application of single -end output voltage as a single polarity, that is, swing between 0V and+2V.

Dual -cross -resistant output configuration

The circuit example in FIG. 5 shows the signal output current connected to the dual voltage feedback amplifier OPA2680. Or I-TO-V Converter . With this circuit, the output of DAC will be kept on a virtual ground to minimize the impact of the output impedance change, thereby obtaining the best DC linearity (INL). As mentioned earlier, be careful not to drive the amplifier to the conversion rate limit and produce unnecessary distortion.

The DC gain of this circuit is equivalentCD2) The noise gain of the OPA2680 will be zero, which may cause a peak response to the closed -loop frequency to increase the peak of compensation for the noise gain on the radio frequency. In order to achieve a flat cross -resistance frequency response, the pole point in each feedback network should be set to:

The gain bandwidth of the gbp OPA

full standard The degree output voltage is defined only by the product of the IOUTFS RF, and has a negative single drift. In order to improve the AC performance of the circuit, the adjustment of radio frequency and/or output power needs to be considered. Further expansion of this application instance can include adding a differential filter at the output of OPA2680, and then add a transformer to convert it to a single -end signal.

Single -end configuration

Use a load resistance connected to a DAC output, a simple current voltage conversion can be completed. The circuit in FIG. 6 shows the 50 the resistor connected to iOT, providing a terminal for further connected 50 cables. Therefore, when the nominal output current is 20mA, the DAC will generate a total signal of 0V to 0.5V in the load of 25 #8486.

As long as it does not exceed the output range, you can choose different load resistance values. In addition, the output current iOUTFS and the load resistance can be adjusted to provide each other to provide the required output signal amplitude and performance.

Internal reference operation

DAC2900 has one on the reference circuit, which includes 1.24V band -gap benchmark and two control amplifiers, each DAC. DAC2900's full standard output current IOUTFS is determined by reference voltage, VREF, and resistance RSET. IOUTF can be calculated through the following formulas:

As shown in Figure 7, the external resistance RSET is connected to the FSA pin (full standard adjustment). The reference control amplifier works as a V-I converter to generate a reference current IREF. Iref is determined by the ratio of VREF and RSET (see the equivalent 10). The full marked output current IOUTFS is obtained by Iref by a fixed factor 32.

When using internal reference, 2K resistance value will generate a full standard output of about 20mA. Considering a resistor with a tolerance of 1%or higher. Choose a higher value, the output current can be adjusted from 20mA to 2mA. Out of the reason for reducing total power consumption, improving distortion performance, or observing output compliance voltage restrictions under the given load conditions, it may be desirable to operate DAC2900 under the output current below 20mA.

It is recommended to use 0.1 μF or higher ceramic chip capacitor to bypass the Refin pin. controlThe internal compensation of the large signal, its small signal bandwidth is about 0.3MHz.

gain setting options

The full standard output current on the DAC2900 can be set in two ways: separate each channel setting in two DAC channels, or set it for two channels at the same time. Essence For the independent gain setting mode, the GSET pin (pin 42) must be low (that is, connected to Agnd). FST (one) is connected to the pin A1, and the other is connected to the pin A1. In this configuration, users can flexibly set and adjust the full standard output current of each DAC, allowing compensation for the possible gains that may be matched in other places in the transmitting signal path.

Or, the GSET pin is high (that is, connect to+VA), the DAC2900 will be switched to the synchronous gain setting mode. Now, the full standard output current of the two DAC channels is determined by only an external RSET resistor connected to the FSA1 pin, and any existing resistor on the FSA2 pin must be removed. The formula of the correct RSET remains unchanged. For example, RSET 2KY will generate 20mA output for two DACs.

External reference operation

You only need to apply an external reference voltage on the REFIN tube foot to disable the internal benchmark. In this example 8 shown. For applications that require higher accuracy and drift performance, or increase the ability to control dynamic gain control, you can consider using external benchmarks.

Although it is recommended to use 0.1 μF capacitors for internal benchmarks, the capacitor is optional for external benchmark operation. Refer to the input Refin with high input impedance (1M ), which can be easily driven by various power supply. Note that the voltage range of the external benchmark should be kept within the reference input compliance range (0.1V to 1.25V).

Power off mode

DAC2900 has a power -off function and can be used to reduce the total power current to less than 6mA within the specified 3.0V to 5.5V power range. The high level of the PD pins should start the power -off mode, while the logic low level can work normally. When keeping the interruption, the inside -oriented pull -down circuit will enable the converter to work normally.

grounding, decoupling and layout information

Correct grounding and bypass, short -drawing length and ground layer use are particularly important for high -frequency design. Multi -layer printing circuit boards are recommended to the best performance because they have significant advantages, such as minimizing ground impedance, separation of signal layers from ground layers, etc.

DAC2900 uses separate pins for its analog and digital power supply and grounding connection. The position of the decoupling capacitor should ensure the simulation power supply (+VA) bypass to the analog ground (AGND), and the digital power bypass to the digital grounding (DGND). In most loveIn the case, the 0.1 μF ceramic capacitor at the foot of each power is enough to provide a low impedance dehuminating path. Keep in mind that their effectiveness depends to a large extent on the degree of approximation of a single power and ground pins. Therefore, they should be as close to these devices as possible. As long as it is possible, the capacitor should be directly below each pair of power/ground pins on the back of the PC board. This layout method will minimize the parasitic inductance of the minimum component and the PCB line.

Further power supply to add a further power supply to the surface of the converter and the surface of the surface with the surface of the converter (1 μF to 4.7μF) can be added to the converter.

All power and grounding connections of DAC2900 require low noise. It is recommended to use a multi -layer PCB with independent power and ground layers. Mixed signal design requires special attention to the wiring of different power currents and signal trajectories. Generally speaking, the simulation power and ground layers should only extend to the analog signal area, such as DAC output signals and reference signals. Digital power and ground layers must be limited to the area covering digital circuits, including digital input cables connected to the converter and clock signals. The analog and digital ground layer should be connected by a point below the DAC. This can be implemented by about 1/8 inches (3mm).

Power supply to DAC2900 by using wide PCB lines or planes. The width current will provide lower tracking impedance to further optimize the power decoupling. The simulation and digital power supply of the converter can only be connected by the power connector of the PC board. In the case of only one power supply voltage to supply DAC, you can use iron oxygen magnet beads and bypass electric containers to create LC filters. This will generate a low noise simulation power supply voltage, and then connect it to the+VA power pins of the DAC2900.

When designing the layout, it is important to keep the simulation signal trajectory separated from any digital line to prevent noise coupling on the analog signal path.

Packaging drawings

Mechanical data

Note: A. All linear size units are all units are all units are all units are all units of size. Millimeter.

B. This drawing will not be notified separately if there is any change.

C. It belongs to Jedec MS-026.