Overview The ICS8344-01 is a low voltage, low skew fanout buffer and a member of the HiPerClockS™ family of high performance clocking solutions from integrated circuits. The ICS8344-01 is designed to translate any differential signal level to the LVCMOS level. This low impedance LVCMOS output for driving 50Ω
Terminate transmission lines in series or parallel. The effective fan-out can be increased to 48 utilized capacity outputs to drive two series termination lines. Redundant clock applications can take advantage of dual clock inputs. Dual clock inputs also facilitate board-level testing. The outputs are synchronous, thus eliminating the runt clock pulses which occur asynchronously to enable and disable the outputs. low when the output is disabled. The ICS8344-01 features full 3.3V, 2.5V and full mixed 3.3V input and 2.5V output power operation modes. Guaranteed output and part-to-part skew features are ideal for those clock distribution applications where the ICS8344-01 is ideal for applications that require definite repeatability and performance. ...

Features • 24 LVCMOS outputs, typical output impedance 7Ω
• Output frequency up to 250MHz
• 85ps bank skew, 200ps output skew, 900ps part skew, part skew • Shift any differential input signal (PECL level, HSTL, LVDS) to LVCMOS without external bias network
• Shift any single-ended LVCMOS input signal to bias resistor input nCLK
• Shift any single-ended input signal by inverting LVCMOS with CLK input bias resistors • Control input LVCMOS
• Synchronous clock enable • 3.3V, 2.5V or 3.3V mix, 2.5V operating power supply mode • 48 leading low profile QFP (LQFP package) in 7mm x 7mm x 1.4mm package with 0.5 package lead pitch mm
• 0°C to 70°C ambient operating temperature • Industrial temperature version available on request