DRV8804 is a four...

  • 2022-09-16 16:00:09

DRV8804 is a four -serial interface low -voltage side drive integrated circuit

Features

4 channel protection low -side drive

- Four N -channel MOSFET

- Integrated inductor clamping diode

-Serial interface

DW packaging: 1.5-a (single channel opening)/800 mAh (four-channel opening) Maximum driving current (25 ° 25 °) At the time of C)

PWP package: 2-a (single channel opening)/1-a (four channel opening) maximum driving current (25 ° C, appropriate PCB heat dissipation)

8.2-V to 60-V working power supply voltage range

thermal enhancement surface installation component

relay driver

Single -pole stepping motor driver

electromagnetic valve driver

General low -voltage side switch application application

Explanation

DRV8804 provides a 4 -channel low -voltage drive with current protection. It has a built -in diode to cut off the interruption of transients generated by the sensing load, which can be used to drive the single -step motor, DC motor, relay, thread tube or other loads.

In SOIC (DW) packaging, DRV8804 can provide continuous output currents of up to 1.5-a (one channel opening) or 800 mA under 25 ° C at 25 ° C. In HTSSOP (PWP) packaging, it can provide continuous output currents of up to 2-a (one channel open) or 1-a (four channels) at a temperature of 25 ° C at a temperature of 25 ° C. Essence

The present invention provides a serial interface, including serial data output, which can control the chrysanthemum chain to control multiple devices with one serial interface.

Provide an internal shutdown function of over -current protection, short -circuit protection, lack of pressure locking and overheating, and the fault is indicated by the fault output pin.

DRV8804 has 20 pins, thermal enhanced SOIC packaging and 16 pin HTSSOP packaging (environmental protection: Rohs amp; no sb/br).

Equipment information

(1), please refer to the appointment appendix at the end of the data table.

Simplified schematic diagram

Typical features

Detailed description

[

123] Overview

DRV8804 is an integrated 4 -channel low -end drive solution, which is suitable for low -end switches applications. The serial interface controls the output of the low -end drive, allowing multiple drives to link together to save space for communication lines. The output of the four low -side drives includes four N -channel MOSFETs, and its typical RDS (ON) is 500 m A separate motor power input VM is used as a device power supply and is adjusted internally to power the low -voltage side grille drive. By high levels of NENBL pin logic, device output can be disabled. This device has several security functions, including integrated over -current protection, limiting the motor current to a fixed maximum value, and the device that exceeds the value will be closed. The heat shutdown protection allows the device to automatically shut down when the mold temperature exceeds the TTSD limit, and restarts after the mold reaches the safety temperature. If the VM is lower than the underwriting threshold, the UVLO protection will disable all circuits in the device.

Figure Figure

Feature description

Output drive

DRV8804 contains four protected low -end drives. Each output has an integrated clamp diode, which is connected to a public pin VCLAMP.

VCLAMP can be connected to the main power voltage VM. It can also be connected to Qina or TVS diode to VM, allowing the switching voltage to exceed the main power voltage VM. When the driver requires a fast current attenuation load, this connection is beneficial, such as a single step into the motor.

In all cases, the output voltage must not exceed the maximum output voltage specification.

Serial interface operation

DRV8804 is controlled by a simple serial interface. Logically, the interface is shown in Figure 6.

Use the SDATIN pin to transfer the data to the temporary retaining register in the component, and every one of the rising along the SCLK pin. The data is also removed from the SDATOUT pin, allowing multiple devices to connect to a serial port. Please note that the SDATOUT pin has a push -driving driver, which can support the driver of another DRV8804 SDATIN pin. The clock frequency is as high as 1 MM, without the need to pull it on the outside. Use pull -up resistors between SDATOUT and external 5 V logic power supply to support higher clock frequencies. TI's recommended resistance value is greater than 1 kΩ. The SDATOUT pin can provide about 1 mAh power and 5 mm. To provide a logical signal to the low -voltage microcontroller, use a resistor division from SDATOUT to GND.

The rising edge of the 引 引 [[locks the data from the temporary displacement register to the output stage.

Starting and reset operation

NenbL pins are enabled or disabled output drives. Nenbl must be lower to enable the output. Nenbl does not affect the operation of serial interface logic. Note that Nenbl has an internal drop -down list.

When driving high electricity, the internal logic of the reset pin is reset, including OCP failure. Clear all serial interface registers. Note that RESET has an internal drop -down menu. It also provides internal power and reset, so it is not necessary to drive reset when power is powered.

Protective circuit

DRV8804 has sufficient protection functions to prevent pressure, over current and overheating events.

Overcurrent protection (OCP)

The analog current limit circuit on each FET is limited to the current by removing the grid driver. If the duration of the analog current is more than the TOCP mud removal time (about 3.5 μs), the driver will be disabled, and the NFAULT pin will be driven to a low level. The driver will keep a disabled state within the review time (about 1.2 milliseconds), and then the fault will be automatically cleared. If the resetting pin is activated or the VM is removed, and the fault will be cleared immediately.

Hot shutdown (TSD)

If the mold temperature exceeds the safety limit, all output FET will be disabled, and the NFAULT pin will be driven low. Once the mold temperature drops to the safe level, the operation will automatically restore.

IOU locking (UVLO)

If the voltage on the VM pins is lower than the IOU lock (UVLO) threshold voltage, all circuits in the device will be disabled, internal logic will be disabled, internal logic It will be reset. When VM is higher than the UVLO threshold, the operation will be restored.

Equipment function mode

When the drain logic of the DR8804 pins is pulled down, the output of V8804 is activated. When the device is low in logic, it is enabled and allowed to use long data cables in a high noise environment. The environment will not accidentally make the device coupling noise. Regardless of the state of Nenbl pins, the device will still transmit data through the SDATIN/SDATOUT cable and SCLK line.

Once the data is moved to each of the four shift registers rows, the lock pins can be pulled up to output four shift registers. Once the locks are pulled up, the state of the four shift registers is placed in the logic and state, which is the opposite of the state of Nenbl pins. If the Nenbl pin is a logical low input, and the lock pin is a logical high level, the open leakage output of the driver channel will be connected.

If the device detects the VM drop below the UVLO threshold, it will immediately enter the state of disable all internal logic. The device will always be disabled until VM rises to the UVLO threshold, and then all internal logic will be reset. During the overcurrent protection (OCP) incident, the device is in a TretryRemove the grid driver within the interval, and the NFAULT pin driver is low. If resetting or removing VM and re -application, the fault will be cleared immediately.

Application and implementation

Note

The information in the following application chapters is not part of the TI component specification, TI does not guarantee its accuracy or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

DRV8804 can be used to drive the single -step motor.

Typical application

Design requirements

Table 1 lists the design parameters of the design example.

Detailed design program

motor voltage

The motor voltage used depends on the rated value of the selected motor and the required torque required torque required Essence The higher voltage shortens the current rising time in the step motor coil, allowing the motor to generate a larger average torque. Using higher voltage can also make the motor run at a faster voltage and faster speed.

Drive current

The current path starts from the power VM, and the inductive winding load and low -side NMOS power FET. The power consumption loss of the single groove NMOS power FET is shown in the formula 1.

On the standard FR-4 PCB, the DRV8804 has been measured at 1.5-A single channel or 800 mAh four-channel (DW packaging), 2-A single channel or single channel or 2-A single channel or 2-A single channel or single channel or single channel or 2-A single channel or single channel or single channel or single channel 1-a four-channel (PWP package). The maximum square -rooted current will change according to the PCB design and environmental temperature. Essence

Application curve

Power suggestion

Body capacitance

A suitable local volume capacitance is the design of the motor drive system design An important factor. Generally speaking, more volume capacitors are beneficial, but the disadvantage is increased cost and physical dimensions.

The required local power capacity depends on multiple factors, including:

the highest current required for the motor system.

capacitance and ability to provide current.

Parasitic inductance between the power supply and the motor system.

acceptable voltage ripples.

the type of motor (brush, brushless DC, step motor).

the type of motor (brush, brushless DC, step motor).

The inductance between the power supply and the motor drive system will be limitedThe change of power supply current. If the local large -capacity capacitance is too small, the system will respond to excessive current requirements, or uninstall from the motor as the voltage changes. When using sufficient large -capacity capacitors, the motor voltage remains stable and can quickly provide large current.

The data table usually provides a recommended value, but it is necessary to perform system -level tests to determine large -capacity capacitors with appropriate size.

The rated voltage of a large -capacity capacitor should be higher than the operating voltage, so that it can provide a lot of time when the motor transmits energy to the power supply.

Layout

Layout Guide

The rated voltage of a large -capacity capacitor should be higher than the operating voltage in order to provide heavyness when the motor transmits energy to the power supply.

small value capacitors should be ceramics and placed near the device pins.

High current equipment output shall use wide metal trace lines.

The equipment hot pad should be welded on the floor floor floor of the PCB. Multiple pores should be used to connect to large bottom ground planes. The heat generated on multiple planes is generated by multiple metal pieces.

Layout example

Heat Precautions

DRV8804 has the heat shutdown (TSD) described in the heat shutdown (TSD). If the mold temperature exceeds about 150 ° C, the device will be disabled until the temperature drops to the safe level.

Any trend of the device entering TSD indicates that the power consumption is too large, insufficient heat dissipation, or the environmental temperature is too high.

Power consumption

The power consumption of DRV8804 is mainly consumed by the output field effect tube resistance (ON). When running a static load, the average power consumption of each field effect tube can be roughly estimated with equations 2.

where:

P is the power consumption of a fet

RDS (on) is every The resistance of a fET

IOUT is equal to the average current consumed by the load

Note that under the condition of starting and failure, the current is much higher than the normal operating current; Peak current and its duration. When multiple loads are driven at the same time, all effective output levels must be added.

The maximum power consumed in the device depends on the ambient temperature and heat dissipation.

Note that RDS (on) increases as the temperature increases, so when the device is heated, the power consumption will increase. When determining the size of the heat sink, this must be considered.

Heating

DRV8804DW packaging uses standard SOICThe shape, but the center pins are melted on the chip pad to remove the calories in the device more effectively.The two central leads on each side should be connected together to eliminate the calories of the equipment as much as possible.If the copper zone is on the other side of the PCB, the thermal hole is used to convey the heat between the top and the bottom layer.

Generally speaking, the more copper area provided, the greater the consumption power.

DRV8804PWP package uses an exposed PowerPad HTSSOP package #8482 ;. PowerPad package to remove the heat in the device.In order to correctly operate, the pad must be connected to the copper heat on the PCB to dissipate heat.On the multi -layer PCB with the floor, this can be achieved by adding multiple holes to connect the hot pad to the horizon.On PCB without internal planes, you can add copper area to any side of the PCB to dissipate heat.If the copper zone is on the other side of the PCB, the thermal hole is used to convey the heat between the top and the bottom layer.