The ISL6532 provides a complete ACPI standard power solution for dual-channel DDR/DDR2 memory systems with up to 4 DIMMs. Includes both a synchronous buck controller and integrated LDO to provide VDDQ high current during S0/S1 state and standby current during S3 state. In run mode, a fully integrated source bank regulator generates an accurate (VDDQ/2) high VTT voltage with no current required for a negative supply. The author provides a reference as VREF for the VDDQ/2 buffered version. The switching PWM controller drives two N-channel MOSFETs in a synchronous rectified buck converter topology. Synchronous buck converters use voltagemode control with fast transient response. The two switches integrate an LDO regulator and stand-by to provide maximum ±2% static regulation accuracy over line, load and temperature ranges. The output is user adjustable by means of external resistors down to 0.8V. Switching between the output of the PWM memory core in the state transition regulator and the LDO is successfully accomplished through the internal control of the ACPI circuit. The N-channel signal provides a synchronous switch with a backfeed for non-blocking switching of the memory during conversion eliminating the need for dual 5V supplies on this route. An integrated soft-start function is brought into regulation to provide VDDQ control when returning to the S0/S1 state from the S4/S5 or mechanical shutdown state. The PGOOD signal at S0 indicates that all supplies are regulated and functioning. Each output monitors under and over voltage events. Current limit is included in the VTT and VDDQ standby regulators. Integrated thermal shutdown.